Integrated Communications Processors
MPC8541E PowerQUICC
™
III Processor
Key Features
Freescale’s MPC8541E PowerQUICC
™
MPC8541E Block Diagram
256 KB
L2 Cache/
SRAM
III integrated communications processor
incorporates a wide range of advanced
Freescale technologies, modular cores
and peripherals. Leveraging Freescale’s
system-on-chip (SoC) PowerQUICC III
platform architecture, the MPC8541E
combines the powerful e500 core, built
on Power Architecture
™
technology, and
peripheral technology to balance processor
performance with I/O system throughput.
Time Slot Assigner
DUART
I
2
C Controller
Interrupt Controller
DDR SDRAM Controller
Local Bus Controller
e500 Core
Coherency
Module
32 KB L1
I Cache
32 KB L1
D Cache
Core Complex Bus
CPM
FCC
FCC
Serial
DMA
ROM
I-mem
DPRAM
32-bit PCI Controller
32/64-bit PCI Controller
DMA Controller
The MPC8541E device’s high level of
integration helps simplify board design and
enhances overall system-level bandwidth
and performance. In addition to the e500 core
and 256 KB of Level 2 (L2) cache memory,
the MPC8541E features an integrated security
engine, a double data rate (DDR) SDRAM
memory controller, dual Gigabit Ethernet
controllers, a four-channel DMA controller,
dual asynchronous receiver/transmitters
(DUART), local bus controller and a 64-bit
PCI controller that can also serve as two
32-bit PCI ports. Dual on-chip PCI support
provides a cost-effective alternative to
separate, discrete PCI bridges and chipsets
for I/O-intensive applications that require
multiple PCI interfaces. The MPC8541E also
supports Communications Processor Module
(CPM) capabilities, such as dual 10/100 Fast
Ethernet controllers, I C controller and a serial
2
Serial Interfaces
SPI
I
2
C
RISC
Engine
Parallel
I/O
Baud Rate
Generators
Timers
10/100/1000 MAC
10/100/1000 MAC
Security Engine
Integrated Security
The MPC8541E processor features a security
engine that supports DES, 3DES, MD-5, SHA-1,
AES and ARC-4 encryption algorithms and
offers a public key accelerator and on-chip
random number generator. This embedded
security core is derived from Freescale’s
security coprocessor product line and offers
the same direct memory access (DMA) and
parallel processing capabilities, as well as the
ability to perform single-pass encryption and
authentication as required by widely used
security protocols, such as IPsec and 802.11i.
Integrated security makes the MPC8541E an
optimal communications processor solution
for applications that require security features
in concert with high performance and low
system-level cost.
Wide Range of Applications
With its high-performance core, I/O
peripherals and integrated security
engine, the MPC8541E processor offers a
powerful control element for networking,
communications and general-purpose
embedded applications. The MPC8541E
serves as an optimal host-processing
solution for a multitude of compute-intensive
applications, such as VPN and firewall routers,
enterprise-class storage systems, Ethernet
switching equipment, SOHO, enterprise router,
business-class imaging equipment and
general-purpose embedded applications.
peripheral interface (SPI).
PowerQUICC™ III Processor Family
Core
Available Frequencies
I-Cache/D-Cache (KB)
Integrated L2 Cache (KB)
Integrated Security Engine
Fast Communications Controllers
Serial Communications Controllers
Ethernet (10/100 only)
Ethernet (10/100/1000)
I
2
C Controller
UTOPIA Level II Ports
Multi-Channel HDLC
PCI Interface
PCI-X Interface
RapidIO
®
Interface
MPC8541E
e500
533 MHz–1 GHz
32/32
256
Yes
2
-
2
2
2
-
-
2x 32-bit or 1x 64-bit
-
-
MPC8540
e500
667 MHz–1 GHz
32/32
256
-
-
-
1
2
1
-
-
1x 32/64-bit
Yes
Yes
MPC8555E
e500
533 MHz–1 GHz
32/32
256
Yes
2
3
Up to 2
2
2
2
Up to 64 (QMC)
2x 32-bit or 1x 64-bit
-
-
MPC8560
e500
667 MHz–1 GHz
32/32
256
-
3
4
Up to 3
2
2
2
Up to 256
1x 32/64-bit
Yes
Yes
Technical Specifications
• Embedded e500 core available from
533 MHz up to 1 GHz
32-bit, dual-issue, superscalar,
seven-stage pipeline
2300 MIPS at 1 GHz
(estimated Dhrystone 2.1)
32 KB L1 data and 32 KB L1 instruction
cache with line-locking support
256 KB on-chip L2 cache with direct
mapped capability
Enhanced hardware and software
debug support
Memory management unit (MMU)
• Two TSECs supporting 10/100/1000 Mbps
Ethernet (IEEE 802.3, 802.3u, 802.3x,
802.3z and 802.3ac-compliant) with two
GMII/TBI/RGMII interfaces
• 166 MHz, 64-bit, 2.5V I/O, DDR SDRAM
memory controller with full ECC support
• Integrated security engine supporting
DES, 3DES, MD-5, SHA-1, AES,
PKEU, RNG and RC-4 encryption
algorithms
• Multiple PCI interface support
64-bit PCI 2.2 bus controller
(up to 66 MHz, 3.3V I/O)
Flexibility to configure two 32-bit
PCI controllers
• 166 MHz, 32-bit, 3.3V I/O, local bus with
memory controller
• Integrated four-channel DMA controller
• Dual I
2
C, DUART, SPI
• Two 10/100 Ethernet controllers
• Interrupt controller
• IEEE 1149.1 JTAG test access port
• 1.2V core power supply (1.3V for 1 GHz
operation) with 3.3V and 2.5V I/O
• 783-pin FC-BGA package
Typical Applications
• VPN and firewall routers
• Branch office and enterprise routers
• Enterprise-class storage
• Ethernet switching equipment
• General purpose embedded applications
• Business-class imaging equipment
PowerQUICC Processors
With more than 5,500 design wins in
communications processors, Freescale’s
PowerQUICC processors are the ideal
choice for your embedded networking and
communication system needs.
To learn more about Freescale’s
communications and networking embedded
solutions, visit us on the web:
www.freescale.com/powerquicc
Learn More:
For current information about Freescale
products and documentation, please visit
www.freescale.com
Freescale
™
and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names
are the property of their respective owners. The Power Architecture and Power.org word marks and the Power and
Power.org logos and related marks are trademarks and service marks licensed by Power.org.
© Freescale Semiconductor, Inc. 2007
Document Number: MPC8541EFS
REV 7
Wireless Connectivity
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