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MC74ACT10DTR2

Description
Logic Gates 5V Triple 3-Input
Categorylogic    logic   
File Size135KB,9 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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MC74ACT10DTR2 Overview

Logic Gates 5V Triple 3-Input

MC74ACT10DTR2 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeTSSOP
package instructionLEAD FREE, TSSOP-14
Contacts14
Reach Compliance Codeunknown
seriesACT
JESD-30 codeR-PDSO-G14
JESD-609 codee4
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions3
Number of entries3
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Sup10 ns
propagation delay (tpd)10 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width4.4 mm

MC74ACT10DTR2 Related Products

MC74ACT10DTR2 MC74ACT10MEL MC74ACT10DR2 MC74AC10NG MC74ACT10NG MC74AC10D
Description Logic Gates 5V Triple 3-Input Logic Gates 5V Triple 3-Input Logic Gates 5V Triple 3-Input Logic Gates 2-6V Triple 3-Input NAND Logic Gates 5V Triple 3-Input NAND Logic Gates 2-6V Triple 3-Input
Is it Rohs certified? conform to conform to incompatible conform to conform to incompatible
Parts packaging code TSSOP SOIC SOIC DIP DIP SOIC
package instruction LEAD FREE, TSSOP-14 SOP, SOP14,.3 SOP, SOP14,.25 DIP, DIP14,.3 DIP, DIP14,.3 SOP, SOP14,.25
Contacts 14 14 14 14 14 14
Reach Compliance Code unknown unknown not_compliant unknown unknown not_compliant
series ACT ACT ACT AC ACT AC
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PDIP-T14 R-PDIP-T14 R-PDSO-G14
JESD-609 code e4 e4 e0 e3 e3 e0
length 5 mm 10.2 mm 8.65 mm 18.86 mm 18.86 mm 8.65 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE
MaximumI(ol) 0.024 A 0.024 A 0.024 A 0.012 A 0.024 A 0.012 A
Number of functions 3 3 3 3 3 3
Number of entries 3 3 3 3 3 3
Number of terminals 14 14 14 14 14 14
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP SOP DIP DIP SOP
Encapsulate equivalent code TSSOP14,.25 SOP14,.3 SOP14,.25 DIP14,.3 DIP14,.3 SOP14,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE IN-LINE IN-LINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 NOT SPECIFIED 240 260 260 240
power supply 5 V 5 V 5 V 3.3/5 V 5 V 3.3/5 V
Prop。Delay @ Nom-Sup 10 ns 10 ns 10 ns 10.5 ns 10 ns 10.5 ns
propagation delay (tpd) 10 ns 10 ns 10 ns 10.5 ns 10 ns 10.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Schmitt trigger NO NO NO NO NO NO
Maximum seat height 1.2 mm 2.05 mm 1.75 mm 4.69 mm 4.69 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 6 V 5.5 V 6 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 2 V 4.5 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES NO NO YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Tin/Lead (Sn/Pb) Tin (Sn) Tin (Sn) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING THROUGH-HOLE THROUGH-HOLE GULL WING
Terminal pitch 0.65 mm 1.27 mm 1.27 mm 2.54 mm 2.54 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 40 NOT SPECIFIED 30 40 40 30
width 4.4 mm 5.275 mm 3.9 mm 7.62 mm 7.62 mm 3.9 mm
Maker ON Semiconductor ON Semiconductor - ON Semiconductor ON Semiconductor ON Semiconductor

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