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MB91F522DSCPMC-GTE2

Description
32-bit Microcontrollers - MCU Auto MCU
Categorysemiconductor    The embedded processor and controller   
File Size5MB,280 Pages
ManufacturerCypress Semiconductor
Environmental Compliance
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32-bit Microcontrollers - MCU Auto MCU

MB91F522DSCPMC-GTE2 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerCypress Semiconductor
Product Category32-bit Microcontrollers - MCU
RoHSDetails
PackagingTray
Moisture SensitiveYes
Factory Pack Quantity119
MB91520 Series
32-bit FR81S Microcontroller
The MB91520 series is a Cypress 32-bit microcontroller designed for automotive devices. This series contains the FR81S CPU
which is compatible with the FR family.
Note:This
series is a composition of the end of the above-mentioned each name of articles of presence, According to Presence of
sub-clock, CSV initial value and LVD initial value. Please see "Ordering Information" for details.
Features
FR81S CPU Core
32-bit RISC, load/store architecture, pipeline 5-stage
structure
Maximum operating frequency: 80 MHz (Source oscillation
= 4.0 MHz and 20 multiplied (PLL clock multiplication
system))
General-purpose register : 32 bits × 16 sets
16-bit fixed length instructions (basic instruction),
1 instruction per cycle
Instructions appropriate to embedded applications
Memory-to-memory transfer instruction
Bit processing instruction
Barrel shift order etc.
High-level language support instructions
Function entry/exit instructions
Register content multi-load and store instructions
Bit search instructions
Logical 1 detection, 0 detection, and change-point detection
Branch instructions with delay slot
Overhead reduction during branch process
Register interlock function
Easy assembler writing
The support at the built-in / instruction level of the multiplier
Signed 32-bit multiplication: 5 cycles
Signed 16-bit multiplication: 3 cycles
Interrupt (PC/PS saving)
6 cycles (16 priority levels)
The Harvard architecture allows simultaneous execution of
program and data access.
Instruction compatibility with the FR Family
Built-in memory protection function (MPU)
Eight protection areas can be specified commonly for
instructions and the data.
Control access privilege in both privilege mode and
user mode.
Built-in FPU (floating point arithmetic)
IEEE754 compliant
Floating-point register 32-bit × 16 sets
Peripheral Functions
Clock generation (equipped with SSCG function)
Main oscillation (4 MHz to 16 MHz)
Sub oscillation (32 kHz) or none sub oscillation
PLL multiplication rate : 1 to 20 times
Equipped with a 100 kHz CR oscillator
Built-in program flash memory capacity
MB91F522: 256 +64 KB
MB91F523: 384 + 64 KB
MB91F524: 512 + 64 KB
MB91F525: 768 + 64 KB
MB91F526: 1024 + 64 KB
Flash memory for built-in data (WorkFlash) 64 KB
Built-in RAM capacity
Main RAM
MB91F522: 48 KB
MB91F523: 48 KB
MB91F524: 64 KB
MB91F525: 96 KB
MB91F526: 128 KB
Backup RAM 8 KB
General-purpose ports:
MB91F52xB 44 sets (No sub oscillation), 42 sets (sub
oscillation)
MB91F52xD 56 sets (No sub oscillation), 54 sets (sub
oscillation)
MB91F52xF 76 sets (No sub oscillation), 74 sets (sub
oscillation)
MB91F52xJ 96 sets (No sub oscillation), 94 sets (sub
oscillation)
MB91F52xK 120 sets (No sub oscillation), 118 sets (sub
oscillation)
MB91F52xL 152 sets (No sub oscillation), 150 sets (sub
oscillation)
Included I
2
C open drain corresponding ports:16 sets
External bus interface
22-bit address, 16-bit data
DMA Controller
Up to 16 channels can be started simultaneously.
2 transfer factors (Internal peripheral request and
software)
A/D converter (successive approximation type)
12-bit resolution : Max. 48 ch (32 ch + 16 ch)
Conversion time : 1.4 μs
Cypress Semiconductor Corporation
Document Number: 002-04662 Rev. *F
198 Champion Court
San Jose, CA 95134-1709
408-943-2600
Revised December 5, 2017
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