EP2C35U484I8 datasheet, PDF - EEWORLD Datasheet

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EP2C35U484I8: DescriptionFPGA - Field Programmable Gate Array FPGA - Cyclone II 2076 LABs 322 IOs; CategoryProgrammable logic devices Programmable logic; File Size109KB，10 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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EP2C35U484I8 Overview

FPGA - Field Programmable Gate Array FPGA - Cyclone II 2076 LABs 322 IOs

EP2C35U484I8 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
package instruction	FBGA, BGA484,22X22,40
Reach Compliance Code	compliant
ECCN code	3A991
Other features	ALSO REQUIRES 3.3 SUPPLY
maximum clock frequency	402.5 MHz
JESD-30 code	S-PBGA-B484
JESD-609 code	e0
length	19 mm
Humidity sensitivity level	3
Configurable number of logic blocks	2076
Number of entries	322
Number of logical units	33216
Output times	306
Number of terminals	484
organize	2076 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA484,22X22,40
Package shape	SQUARE
Package form	GRID ARRAY, FINE PITCH
Peak Reflow Temperature (Celsius)	220
power supply	1.2,1.5/3.3,3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	2.2 mm
Maximum supply voltage	1.25 V
Minimum supply voltage	1.15 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	19 mm

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1. Introduction

CII51001-3.2

Introduction

Following the immensely successful first-generation Cyclone

device

family, Altera

Cyclone II FPGAs extend the low-cost FPGA density

range to 68,416 logic elements (LEs) and provide up to 622 usable I/O

pins and up to 1.1 Mbits of embedded memory. Cyclone II FPGAs are

manufactured on 300-mm wafers using TSMC's 90-nm low-k dielectric

process to ensure rapid availability and low cost. By minimizing silicon

area, Cyclone II devices can support complex digital systems on a single

chip at a cost that rivals that of ASICs. Unlike other FPGA vendors who

compromise power consumption and performance for low-cost, Altera’s

latest generation of low-cost FPGAs—Cyclone II FPGAs, offer 60% higher

performance and half the power consumption of competing 90-nm

FPGAs. The low cost and optimized feature set of Cyclone II FPGAs make

them ideal solutions for a wide array of automotive, consumer,

communications, video processing, test and measurement, and other

end-market solutions. Reference designs, system diagrams, and IP, found

www.altera.com,

are available to help you rapidly develop complete

end-market solutions using Cyclone II FPGAs.

Low-Cost Embedded Processing Solutions

Cyclone II devices support the Nios II embedded processor which allows

you to implement custom-fit embedded processing solutions. Cyclone II

devices can also expand the peripheral set, memory, I/O, or performance

of embedded processors. Single or multiple Nios II embedded processors

can be designed into a Cyclone II device to provide additional

co-processing power or even replace existing embedded processors in

your system. Using Cyclone II and Nios II together allow for low-cost,

high-performance embedded processing solutions, which allow you to

extend your product's life cycle and improve time to market over

standard product solutions.

Low-Cost DSP Solutions

Use Cyclone II FPGAs alone or as DSP co-processors to improve

price-to-performance ratios for digital signal processing (DSP)

applications. You can implement high-performance yet low-cost DSP

systems with the following Cyclone II features and design support:

■

Altera Corporation

February 2008

Up to 150 18 × 18 multipliers

Up to 1.1 Mbit of on-chip embedded memory

High-speed interfaces to external memory

1–1

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