End of Life. Last Available Purchase Date is 31-Dec-2014
Si9105
Vishay Siliconix
1-W High-Voltage Switchmode Regulator
FEATURES
CCITT Compatible
Current-Mode Control
Low Power Consumption
(less than 5 mW)
10- to 120-V Input Range
200-V, 250-mA MOSFET
Internal Start-Up Circuit
Current-Mode Control
SHUTDOWN and RESET
DESCRIPTION
The Si9105 high-voltage switchmode regulator is a monolithic
BiC/DMOS integrated circuit which contains most of the
components necessary to implement a high-efficiency dc/dc
converter in ISDN terminals up to 3 watts. A 0.5-mA max
supply current makes possible the design of a dc/dc converter
with 60% efficiency at 25 mW, therefore meeting the
recommended
performance
under
the
CCITT
I.430 specifications.
This device may be used with an appropriate transformer to
implement isolated flyback power converter topologies to
provide single or multiple regulated dc outputs (i.e., 5 V).
The Si9105 is available in both standard and lead (Pb)-free
16-pin wide-body SOIC, 14-pin plastic DIP and 20-pin PLCC
packages which are specified to operate over the industrial
temperature range of −40 C to 85 C.
FUNCTIONAL BLOCK DIAGRAM
FB
COMP
DISCHARGE
OSC
IN
OSC
OUT
Error
Amplifier
−
V
REF
+
4 V (1%)
Ref
Gen
2V
−
+
+
−
1.2 V
BIAS
V
CC
+V
IN
8.7 V
−
+
9.3 V
−
+
Undervoltage Comparator
Current
Sources
To
Internal
Circuits
C/L
Comparator
Current-Mode
Comparator
OSC
Clock (½ f
OSC
)
R
Q
S
DRAIN
−V
IN
(BODY)
V
CC
SOURCE
S
Q
R
SHUTDOWN
RESET
Document Number: 70003
S-42030—Rev. H, 15-Nov-04
www.vishay.com
1
Si9105
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to
−V
IN
(V
CC
< +V
IN
+ 0.3 V)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 V
V
DS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V
I
D
(Peak) (300
ms
pulse, 2% duty cycle) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 A
I
D
(rms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mA
Logic Inputs (RESET,
SHUTDOWN, OSC IN) . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
Linear Inputs (FEEDBACK, SOURCE) . . . . . . . . . . . . . . . . . . .
−0.3
V to 7 V
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . . 5 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65
to 125_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
to 85_C
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/_C above 25_C
c. Derate 7.2 mW/_C above 25_C
d. Derate 11.2 mW/_C above 25_C
Power Dissipation (Package)
a
14-Pin Plastic DIP (J Suffix)
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW
16-Pin Plastic Wide-Body SOIC (W Suffix)
c
. . . . . . . . . . . . . . . . . . . 900 mW
20-Pin PLCC (N Suffix)
d
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1400 mW
Thermal Impedance (Q
JA
)
14-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W
16-Pin Plastic Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
20-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90_C/W
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltages Referenced to
−V
IN
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 13.5 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 120 V
f
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kW to 1 MW
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
−
3 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
Parameter
Reference
Output Voltage
Output Impedance
e
Short Circuit Current
Temperature Stability
e
Long Term
Stability
e
V
R
Z
OUT
I
SREF
T
REF
OSC IN = V
IN
(OSC Disabled)
R
L
= 10 MW
OSC IN =
−V
IN
OSC IN =
−
V
IN
, V
REF
=
−V
IN
OSC IN =
−V
IN
t = 1000 hrs, T
A
= 125_C
Room
Room
Room
Full
Room
3.92
15
70
4.00
300
100
0.25
5.00
4.08
45
130
1.0
25.00
V
kW
mA
mV/_C
mV
Limits
Temp
b
Min
c
Typ
d
Max
c
Unit
Symbol
DISCHARGE =
−V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 820 kW , R
OSC
= 910 kW
Oscillator
Maximum Frequency
e
Initial Accuracy
Voltage Stability
Temperature Coefficient
e
f
MAX
f
OSC
Df/f
T
OSC
R
OSC
= 0
See Note e
Df/f
= f (13.5 V)
−
f (9.5 V)/f (9.5 V)
Room
Room
Room
Full
1
32
3
40
10
200
48
15
500
MHz
kHz
%
ppm/_C
Error Amplifier
Feedback Input Voltage
Input BIAS Current
Open Loop Voltage Gain
e
Input Offset Voltage
Unity Gain Bandwidth
e
Dynamic Output Impedance
Output Current
Power Supply Rejection
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V
FB
I
FB
A
VOL
V
OS
BW
Z
OUT
I
OUT
PSRR
Source (V
FB
= 3.4 V)
Sink (V
FB
= 4.5 V)
10 V
v
V
CC
v
13.5 V
OSC IN =
−V
IN
FB Tied to COMP
OSC IN =
−V
IN
(OSC Disabled)
OSC IN =
−V
IN
, V
FB
= 4 V
OSC IN =
−V
IN
(OSC Disabled)
Room
Room
Room
Room
Room
Room
Room
Room
Room
0.05
0.5
60
3.96
4
25
80
"15
0.8
1
−1.2
0.08
70
−0.32
"40
4.04
500
V
nA
dB
mV
MHz
kW
mA
dB
2
Document Number: 70003
S-42030—Rev. H, 15-Nov-04
Si9105
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
Parameter
Current Limit
Threshold Voltage
Delay to Output
e
Input Voltage
Input Leakage Current
Pre-Regulator Start-Up Current
V
CC
Pre-Regulator
Turn-Off Threshold Voltage
Undervoltage Lockout
V
REG
−
V
UVLO
V
SOURCE
t
d
+V
IN
+I
IN
I
START
V
REG
V
UVLO
V
DELTA
R
L
= 100
W
from DRAIN to V
CC
V
FB
= 0 V
R
L
= 100
W
from DRAIN to V
CC
V
SOURCE
= 1.5 V, See Figure 1
I
IN
= 10
mA
V
CC
w
10 V
Pulse Width
v
300
ms,
V
CC
= 7 V
I
PRE-REGULATOR
= 10
mA
R
L
= 100
W
from DRAIN to V
CC
See Detailed Description
Room
Room
Room
Room
Room
Room
Room
Room
8
7.5
7.0
0.25
15
9.3
8.7
0.5
9.7
9.2
V
120
10
0.8
1.0
200
1.2
300
V
ns
V
mA
mA
Limits
Temp
b
Min
c
Typ
d
Max
c
Unit
Symbol
DISCHARGE =
−V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 820 kW , R
OSC
= 910 kW
Supply
Supply Current
Bias Current
SHUTDOWN Delay
SHUTDOWN Pulse Width
RESET Pulse Width
Latching Pulse Width
SHUTDOWN and RESET Low
Input Low Voltage
Input High Voltage
Input Current, Input Voltage High
Input Current. Input Voltage Low
I
CC
I
BIAS
t
SD
t
SW
t
RW
t
LW
V
IL
V
IH
I
IH
I
IL
V
IN
= 10 V
V
IN
= 0 V
See Figure 3
V
SOURCE
=
−V
IN
, See Figure 2
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
−35
8.0
1
−25
5
50
50
25
2.0
V
mA
ns
0.35
7.5
50
100
0.5
mA
mA
MOSFET Switch
Breakdown Voltage
Drain-Source On Resistance
g
Drain Off Leakage Current
Drain Capacitance
V(
BR)DSS
r
DS(on)
I
DSS
C
DS
I
DRAIN
= 100
mA
I
DRAIN
= 100 mA
V
DRAIN
= 100 V
Full
Room
Room
Room
35
200
220
5
7
10
V
W
mA
pF
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f.
C
STRAY
Pin 8 =
v
5 pF
g. Temperature coefficient of r
DS(on)
is 0.75% per
_C,
typical.
Document Number: 70003
S-42030—Rev. H, 15-Nov-04
www.vishay.com
3