MAX1123EGK+D datasheet, PDF - EEWORLD Datasheet

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MAX1123EGK+D: DescriptionAnalog to Digital Converters - ADC 1.8V, 10-Bit, 210Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications; CategoryAnalog mixed-signal IC converter; File Size251KB，17 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html; Environmental Compliance

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MAX1123EGK+D Overview

Analog to Digital Converters - ADC 1.8V, 10-Bit, 210Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications

MAX1123EGK+D Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Maxim
Parts packaging code	QFN
package instruction	HVQCCN, LCC68,.4SQ,20
Contacts	68
Reach Compliance Code	compliant
ECCN code	3A991.C.1
Factory Lead Time	6 weeks
Maximum analog input voltage	1.375 V
Minimum analog input voltage	1.1 V
Converter type	ADC, PROPRIETARY METHOD
JESD-30 code	S-XQCC-N68
JESD-609 code	e3
length	10 mm
Maximum linear error (EL)	0.1953%
Humidity sensitivity level	3
Number of analog input channels	1
Number of digits	10
Number of functions	1
Number of terminals	68
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output bit code	BINARY, OFFSET BINARY, 2\'S COMPLEMENT BINARY
Output format	PARALLEL, WORD
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC68,.4SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	1.8 V
Certification status	Not Qualified
Sampling rate	210 MHz
Sample and hold/Track and hold	TRACK
Maximum seat height	0.9 mm
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm

MAX1123EGK+D Related Products

	MAX1123EGK+D	MAX1123EGK+TD
Description	Analog to Digital Converters - ADC 1.8V, 10-Bit, 210Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications	Analog to Digital Converters - ADC 1.8V, 10-Bit, 210Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	Maxim	Maxim
Parts packaging code	QFN	QFN
package instruction	HVQCCN, LCC68,.4SQ,20	HVQCCN, LCC68,.4SQ,20
Contacts	68	68
Reach Compliance Code	compliant	compliant
ECCN code	3A991.C.1	3A991.C.1
Factory Lead Time	6 weeks	6 weeks
Maximum analog input voltage	1.375 V	1.375 V
Minimum analog input voltage	1.1 V	1.1 V
Converter type	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD
JESD-30 code	S-XQCC-N68	S-XQCC-N68
JESD-609 code	e3	e3
length	10 mm	10 mm
Maximum linear error (EL)	0.1953%	0.1953%
Humidity sensitivity level	3	3
Number of analog input channels	1	1
Number of digits	10	10
Number of functions	1	1
Number of terminals	68	68
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output bit code	BINARY, OFFSET BINARY, 2\'S COMPLEMENT BINARY	BINARY, OFFSET BINARY, 2\'S COMPLEMENT BINARY
Output format	PARALLEL, WORD	PARALLEL, WORD
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Encapsulate equivalent code	LCC68,.4SQ,20	LCC68,.4SQ,20
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260
power supply	1.8 V	1.8 V
Certification status	Not Qualified	Not Qualified
Sampling rate	210 MHz	210 MHz
Sample and hold/Track and hold	TRACK	TRACK
Maximum seat height	0.9 mm	0.9 mm
Nominal supply voltage	1.8 V	1.8 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	MATTE TIN
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	10 mm	10 mm

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