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8725BY-01LFT

Description
Clock Generators & Support Products Differential-to-HSTL Zero Delay Clock
Categorylogic    logic   
File Size708KB,19 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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8725BY-01LFT Overview

Clock Generators & Support Products Differential-to-HSTL Zero Delay Clock

8725BY-01LFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTQFP
package instructionLQFP, QFP32,.35SQ,32
Contacts32
Manufacturer packaging codePRG32
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys Confidence3
Samacsys StatusReleased
Samacsys PartID11129713
Samacsys Pin Count32
Samacsys Part CategoryIntegrated Circuit
Samacsys Package CategoryQuad Flat Packages
Samacsys Footprint NamePRG32_-
Samacsys Released Date2020-01-30 17:18:03
Is SamacsysN
Other featuresALSO OPERATES WITH 1.6V TO 2V SUPPLY
series5V
Input adjustmentDIFFERENTIAL MUX
JESD-30 codeS-PQFP-G32
JESD-609 codee3
length7 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals32
Actual output times5
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP32,.35SQ,32
Package shapeSQUARE
Package formFLATPACK
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup4.4 ns
propagation delay (tpd)4.4 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.045 ns
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width7 mm
Base Number Matches1
Differential-to-HSTL Zero Delay Clock
Generator
ICS8725B-01
DATA SHEET
General Description
The ICS8725B-01 is a highly versatile 1:5 Differential-
to-HSTL clock generator and a member of the
HiPerClockS™
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS8725B-01 has a fully
integrated PLL and can be configured as zero delay
buffer, multiplier or divider, and has an output frequency range of
31.25MHz to 700MHz. The reference divider, feedback divider and
output divider are each programmable, thereby allowing for the
following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4,
1:8. The external feedback allows the device to achieve “zero delay”
between the input clock and the output clocks. The PLL_SEL pin can
be used to bypass the PLL for system test and debug purposes. In
bypass mode, the reference clock is routed around the PLL and into
the internal output dividers.
Features
Five differential HSTL output pairs
Selectable differential CLKx/nCLKx input pairs
CLKx/nCLKx pairs can accept the following differential
input levels: LVPECL, LVDS, HSTL, HCSL, SSTL
Output frequency range: 31.25MHz to 700MHz
Input frequency range: 31.25MHz to 700MHz
VCO range: 250MHz to 700MHz
External feedback for “zero delay” clock regeneration
with configurable frequencies
Programmable dividers allow for the following output-to-input
frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
Static phase offset: 15ps ± 135ps
Cycle-to-cycle jitter: 25ps (maximum)
Output skew: 45ps (maximum)
3.3V core, 1.8V output operating supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS
Block Diagram
PLL_SEL
Q0
nQ0
Q1
nQ1
0
1
CLK1
nCLK1
CLK_SEL
FB_IN
nFB_IN
8:1, 4:1, 2:1, 1:1
1:2, 1:4, 1:8
1
Q3
nQ3
Q2
nQ2
Pin Assignment
PLL_SEL
SEL3
GND
V
DDA
V
DDO
Q4
nQ4
V
DD
CLK0
nCLK0
÷1, ÷2, ÷4, ÷8
÷16, ÷32, ÷64
0
32 31 30 29 28 27 26 25
SEL0
SEL1
CLK0
nCLK0
CLK1
nCLK1
CLK_SEL
MR
1
2
3
4
5
6
7
8
9
V
DD
24
23
22
21
20
19
18
17
10 11 12 13 14 15 16
nFB_IN
FB_IN
SEL2
V
DDO
GND
nQ0
Q0
V
DDO
Q3
nQ3
Q2
nQ2
Q1
nQ1
V
DDO
PLL
Q4
nQ4
SEL0
SEL1
SEL2
SEL3
MR
ICS8725B-01
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
ICS8725BY-01 REVISION A JULY 16, 2009
1
©2009 Integrated Device Technology, Inc.

8725BY-01LFT Related Products

8725BY-01LFT 8725BY-01LF
Description Clock Generators & Support Products Differential-to-HSTL Zero Delay Clock Clock Generators & Support Products Differential-to-HSTL Zero Delay Clock
Brand Name Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TQFP TQFP
package instruction LQFP, QFP32,.35SQ,32 LQFP, QFP32,.35SQ,32
Contacts 32 32
Manufacturer packaging code PRG32 PRG32
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Samacsys Confidence 3 3
Samacsys Status Released Released
Samacsys PartID 11129713 1176275
Samacsys Pin Count 32 32
Samacsys Part Category Integrated Circuit Integrated Circuit
Samacsys Package Category Quad Flat Packages Quad Flat Packages
Samacsys Footprint Name PRG32_- PRG32-_
Samacsys Released Date 2020-01-30 17:18:03 2020-01-31 03:42:46
Is Samacsys N N
Other features ALSO OPERATES WITH 1.6V TO 2V SUPPLY ALSO OPERATES WITH 1.6V TO 2V SUPPLY
series 5V 5V
Input adjustment DIFFERENTIAL MUX DIFFERENTIAL MUX
JESD-30 code S-PQFP-G32 S-PQFP-G32
JESD-609 code e3 e3
length 7 mm 7 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Humidity sensitivity level 3 3
Number of functions 1 1
Number of terminals 32 32
Actual output times 5 5
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Encapsulate equivalent code QFP32,.35SQ,32 QFP32,.35SQ,32
Package shape SQUARE SQUARE
Package form FLATPACK FLATPACK
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 4.4 ns 4.4 ns
propagation delay (tpd) 4.4 ns 4.4 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.045 ns 0.045 ns
Maximum seat height 1.6 mm 1.6 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 30
width 7 mm 7 mm
Base Number Matches 1 1

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