LD3986
SERIES
DUAL ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE
REG. FOR USE WITH VERY LOW ESR OUT. CAPACITORS
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INPUT VOLTAGE FROM 2.5V TO 6V
STABLE WITH LOW ESR CERAMIC
CAPACITORS
ULTRA LOW DROPOUT VOLTAGE (60mV
TYP. AT 150mA LOAD, 0.4mV TYP. AT 1mA
LOAD)
VERY LOW QUIESCENT CURRENT (155µA
TYP. AT NO LOAD, 290µA TYP. AT 150mA
LOAD; MAX 2µA IN OFF MODE)
GUARANTEED OUTPUT CURRENT UP TO
150mA FOR BOTH OUTPUTS
DUAL OUTPUT VOLTAGES
FAST TURN-ON TIME: TYP. 120µs (C
O
=1µF,
C
BYP
=10nF AND I
O
=1mA)
LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN
INTERNAL CURRENT AND THERMAL LIMIT
OUTPUT LOW NOISE VOLTAGE 30µV
RMS
OVER 10Hz to 100KHz
S.V.R. OF 50dB AT 1KHz, 40dB AT 10KHz
TEMPERATURE RANGE: -40°C TO 125°C
Flip-Chip
DESCRIPTION
The LD3986 provides up to 150mA at each output,
from 2.5V to 6V input voltage. The ultra low
drop-voltage, low quiescent current and low noise
make it suitable for low power applications and in
battery powered systems. Regulator ground
current increases only slightly in dropout, further
prolonging the battery life. Power supply rejection
is 50 dB at 1KHz and 40 dB at 10KHz. High power
supply rejection is maintained down to low input
voltage levels common to battery operated
circuits. Shutdown Logic Control function is
available for each output, this means that when
the device is used as local regulator, it is possible
to put a part of the board in standby, decreasing
the total power consumption. The LD3986 is
designed to work with low ESR ceramic
capacitors. Typical applications are in mobile
phone and similar battery powered wireless
systems.
Figure 1: Schematic Diagram
September 2005
Rev. 3
1/12
LD3986 SERIES
Table 1: Order Codes
Flip-Chip
LD3986J12248R
Flip-Chip (Lead Free)
LD3986J122R-E
LD3986J12248R-E
LD3986J1828R-E
LD3986J2528R-E (*)
LD3986J28R-E
LD3986J285R-E
LD3986J29R-E (*)
LD3986J30R-E (*)
LD3986J2830R-E (*)
LD3986J3133R-E (*)
LD3986J33R-E
1 OUTPUT VOLTAGES
1.22 V
1.22 V
1.8 V
2.5 V
2.8 V
2.85 V
2.9 V
3.0 V
2.8 V
3.1 V
3.3 V
2 OUTPUT VOLTAGES
1.22 V
4.8 V
2.8 V
2.8 V
2.8 V
2.85 V
2.9 V
3.0 V
3.0 V
3.3 V
3.3 V
LD3986J285R
(*) Available on Request.
Table 2: Absolute Maximum Ratings
Symbol
V
I
V
O1,2
V
EN1,2
I
O
P
D
T
STG
T
OP
DC Input Voltage
DC Output Voltage
ENABLE Input Voltage
Output Current
Power Dissipation
Storage Temperature Range
Operating Junction Temperature Range
Parameter
Value
-0.3 to 6
-0.3 to V
I
+0.3
-0.3 to V
I
+0.3
Internally limited
Internally limited
-65 to 150
-40 to 125
°C
°C
Unit
V
V
V
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
Table 3: Thermal Data
Symbol
R
thj-amb
Parameter
Thermal Resistance Junction-Ambient
Flip-Chip
120
Unit
°C/W
2/12
LD3986 SERIES
Figure 2: Pin Connection
(top through view)
Table 4: Pin Description
Symbol
V
O2
EN2
BYPASS
GND
GND
EN1
V
O1
V
I
Pin N°
A1
B1
C1
C2
C3
B3
A3
A2
Output Voltage 2 of the dual LDO
Enables voltage for output voltage 2: ON MODE when V
EN
≥
1.4V, OFF MODE when V
EN
≤
0.4V (Do not leave floating, not internally pulled down/up)
Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise voltage
Common Ground
Common Ground
Enables voltage for output voltage 1: ON MODE when V
EN
≥
1.4V, OFF MODE when V
EN
≤
0.4V (Do not leave floating, not internally pulled down/up)
Output Voltage 1 of the dual LDO
Input Voltage for both LDO
Name and Function
Figure 3: Typical Application Circuit
3/12
LD3986 SERIES
Symbol
C
O
Parameter
Output Capacitor
Capacitance
ESR
Test Conditions
Min.
1
0.005
Typ.
Max.
22
5
Unit
µF
Ω
Note 1: For V
O
< 2V, V
I
=2.5V
Note 2: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specifi-
cation does not apply for input voltages below 2.5V.
Note 3: Enable pin must be driven with a T
R
= T
F
< 10ms
Note 4: Turn-on time is time measured between the enable input just exceeding V
INH
High Value and the output voltage just reaching 95%
of its nominal value
Note 5: Typical thermal protection hysteresis is 20°C
Figure 4: SVR Input Voltage Test Signal
Figure 5: AC Line Regulation Input Voltage Test Signal
5/12
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