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UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
REGULATING PULSE WIDTH MODULATORS
1
FEATURES
8-V to 35-V Operation
5.1-V Reference Trimmed to 1%
100-Hz to 500-kHz Oscillator Range
Separate Oscillator Sync Terminal
Adjustable Deadtime Control
Internal Soft-Start
Pulse-by-Pulse Shutdown
Input Undervoltage Lockout With Hysteresis
Latching PWM to Prevent Multiple Pulses
Dual Source/Sink Output Drivers
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
The UC1525A/1527A series of pulse width modulator
integrated circuits are designed to offer improved
performance and lowered external parts count when
used in designing all types of switching power
supplies. The on-chip +5.1-V reference is trimmed to
1% and the input common-mode range of the error
amplifier includes the reference voltage, eliminating
external resistors. A sync input to the oscillator allows
multiple units to be slaved or a single unit to be
synchronized to an external system clock. A single
resistor between the C
T
and the discharge terminals
provides a wide range of dead-time adjustment.
These devices also feature built-in soft-start circuitry
with only an external timing capacitor required. A
shutdown terminal controls both the soft-start circuitry
and the output stages, providing instantaneous turn
off through the PWM latch with pulsed shutdown, as
well as soft-start recycle with longer shutdown
commands.
BLOCK DIAGRAM
VREF
16
OSC
OUT
4
13
Reference
Regulator
To Internal
Circutry
Flip
Flop
NOR
14
OUTPUT B
UVLO
Lockout
NOR
11
OUTPUT A
VC
+VIN
15
GROUND 12
SYNC
RT
CT
3
6
OSC
5
DISCHARGE 7
UC1525A
Output Stage
13
COMP
COMPENSATION 9
INV INPUT 1
NI INPUT 2
SOFTSTART 8
3 kW
SHUTDOWN 10
OR
14
OUTPUT B
Error
Amp
VREF
50
m
A
R
S
S
PWM
Latch
OR
11
OUTPUT A
VC
5 kW
UC1527A
Output Stage
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2008, Texas Instruments Incorporated
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (continued)
These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start
capacitor discharged for sub-normal input voltages. This lockout circuitry includes approximately 500 mV of
hysteresis for jitter- free operation. Another feature of these PWM circuits is a latch following the comparator.
Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period.
The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking
in excess of 200 mA. The UC1525A output stage features NOR logic, giving a LOW output for an OFF state. The
UC1527A utilizes OR logic which results in a HIGH output level when OFF.
ABSOLUTE MAXIMUM RATINGS
(1)
UCx52xA
+V
IN
V
C
Supply voltage
Collector supply voltage
Logic inputs
Analog inputs
Output current, source or sink
Reference output current
Oscillator charging current
Power dissipation at T
A
= +25°C
Operating junction temperature
Storage temperature range
Lead temperature (soldering, 10 seconds)
(1)
(2)
Values beyond which damage may occur.
See Thermal Characteristics table.
(2)
UNIT
40
40
–0.3 to +5.5
–0.3 to +V
IN
500
50
5
1000
2000
–55 to 150
–65 to 150
300
°C
mW
mA
V
Power dissipation at T
C
= +25°C
(2)
RECOMMENDED OPERATING CONDITIONS
(1)
MIN
+V
IN
V
C
Input voltage
Collector supply voltage
Sink/source load current (steady state)
Sink/source load current (peak)
Reference load current
Oscillator frequency range
Oscillator timing resistor
Oscillator timing capacitorm
Dead time resistor range
UC1525A, UC1527A
Operating ambient temperature range
UC2525A, UC2527A
UC3525A, UC3527A
(1)
Range over which the device is functional and parameter limits are assured.
8
4.5
0
0
0
100
2
0.001
0
–55
–25
0
MAX
35
35
100
400
20
400
150
0.01
500
125
85
70
°C
Hz
kΩ
µF
Ω
mA
UNIT
V
2
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Copyright © 1997–2008, Texas Instruments Incorporated
Product Folder Link(s):
UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
www.ti.com
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
THERMAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PACKAGE
J-16
N-16
DW-16
PLCC-20
LCC-20
θ
JA
80-120
90
45-90
43-75
70-80
θ
JC
28
45
25
34
20
PLCC-20, LCC-20
Q AND L PACKAGES
(TOP VIEW)
CONNECTION DIAGRAMS
DIL-16
J or N PACKAGE
(TOP VIEW)
INV Input
NI Input
SYNC
OSC Output
C
T
R
T
Discharge
Soft Start
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
REF
+V
IN
Output B
V
C
Ground
Output A
Shutdown
Compensation
SYNC
OSC Output
NC
C
T
R
T
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NI Input
INV Input
NC
V REF
+V IN
Output B
V
C
NC
Ground
Output A
NC − No internal connection
Copyright © 1997–2008, Texas Instruments Incorporated
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Discharge
Soft Start
NC
Compensation
Shutdown
3
Product Folder Link(s):
UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
www.ti.com
ELECTRICAL CHARACTERISTICS
+V
IN
= 20 V, and over operating temperature, unless otherwise specified, T
A
= T
J
PARAMETER
REFERENCE
Output voltage
Line regulationg
Load regulationg
Temperature stability
(1)
TEST CONDITIONS
UC152xA, UC252xA
UC352xA
MIN
5.05
5.0
TYP
5.10
5.1
10
20
20
MAX
5.15
5.2
20
50
50
5.2
5.25
UNIT
T
J
= 25°C
V
IN
= 8 V to 35 V
I
L
= 0 mA to 20 mA
Over operating range
Line, load, and temperature
V
REF
= 0, T
J
= 25°C
10 Hz
≤
10 kHz, T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
V
IN
= 8 V to 35 V
(1)
V
mV
Total output variation
(1)
Shorter circuit current
Output noise Voltage
(1)
Long term stability
Initial accuracy
(1)
(1)
UC152xA, UC252xA
UC352xA
5.0
4.95
80
40
20
2%
V
mA
µVrms
mV
100
200
50
6%
1%
2%
6%
120
OSCILLATOR SECTION
(2)
(2)
(2)
Voltage stability
(1)
UC152xA, UC252xA
UC352xA
0.3%
1%
3%
400
1.7
3.0
0.3
1.2
2.0
3.5
0.5
2.0
1.0
Temperature stability
Minimum frequency
Maximum frequency
Current mirror
Clock amplitude
Clock width
(1)
(1) (2)
(2)
Over operating range
R
T
= 200 kΩ, C
T
= 0.1
µF
R
T
= 2 kΩ, C
T
= 470 pF
I
RT
= 2 mA
T
J
= 25°C
(2)
Hz
kHz
mA
V
µs
V
mA
mV
2.2
1.0
2.8
2.5
5
10
10
1
Syncronization threshold
(1)
Sync input current
Sync voltage = 3.5 V
UC152xA, UC252xA
UC352xA
ERROR AMPLIFIER SECTION (V
CM
= 5.1 V)
Input offset voltage
Input bias current
Input offset current
DC open loop gain
Gain-bandwidth product
DC transconductanc
(1)
(1)
(3)
0.5
2
1
µA
dB
MHz
mS
R
L
≥
10 MΩ
A
V
= 0 dB, T
J
= 25°C
T
J
= 25°C, 30 kΩ
≤
R
L
≤
1 MΩ
60
1
1.1
3.8
75
2
1.5
0.2
5.6
75
60
0.5
Low-level output voltage
High-level output voltage
Common mode rejection
Supply voltage rejection
(1)
(2)
V
CM
= 1.5 V to 5.2 V
V
IN
= 8 V to 35 V
60
50
V
dB
These parameters, although ensured over the recommended operating conditions, are not 100% tested in production.
Tested at f
OSC
= 40 kHz (R
T
= 3.6 kΩ, C
T
= 0.01
µF,
R
D
= 0. Approximate oscillator frequency is defined by:
f
+
(3)
1
C
T
0.7R
T
)
3R
D
DC transconductance (g
M
) relates to DC open-loop voltage gain (A
V
) according to the following equation: A
V
= g
M
R
L
where R
L
is the
resistance from pin 9 to ground. The minimum g
M
specification is used to calculate minimum A
V
when the error amplifier output is
loaded.
4
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Copyright © 1997–2008, Texas Instruments Incorporated
Product Folder Link(s):
UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
www.ti.com
UC1525A, UC1527A
UC2525A, UC2527A
UC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
ELECTRICAL CHARACTERISTICS (continued)
+V
IN
= 20 V, and over operating temperature, unless otherwise specified, T
A
= T
J
PARAMETER
PWM COMPARATOR
Minimum duty-cycle
Maximum duty-cycle
Input threshold
(4)
Input bias current
(4)
SHUTDOWN
Soft-start current
Soft-start low level
Shutdown threshold
Shutdown input current
Shutdown Delay
(5)
TEST CONDITIONS
MIN
TYP
MAX
0%
UNIT
45%
Zero duty-cycle
Maximum duty-cycle
0.7
49%
0.9
3.3
0.05
3.6
1.0
80
0.7
1.0
1.0
0.5
0.4
2.0
V
8
200
100
50
14
600
300
20
µA
ns
V
µA
µA
V
mA
µs
V
SD
= 0 V, V
SS
= 0 V
V
SD
= 2.5 V
To outputs, V
SS
= 5.1 V, T
J
= 25°C
V
SD
= 2.5 V
V
SD
= 2.5 V, T
J
= 25°C
I
SINK
= 20 mA
I
SINK
= 100 mA
I
SOURCE
= 20 mA
I
SOURCE
= 100 mA
V
COMP
and V
SS
= High
V
C
= 35 V
C
L
= 1 nF, T
J
= 25°C
C
L
= 1 nF, T
J
= 25°C
V
IN
= 35 V
25
0.6
50
0.4
0.8
0.4
0.2
0.2
1.0
OUTPUT DRIVERS (each output) (V
C
= 20 V)
Low-level output voltage
High-level output voltage
Undervoltage lockout
V
C
OFF Current
Rise Time
(5)
(6)
18
17
6
19
18
7
Fall Time
(5)
TOTAL STANDBY CURRENT
Supply Current
(4)
(5)
(6)
mA
Tested at f
OSC
= 40 kHz (R
T
= 3.6 kΩ, C
T
= 0.01
µF,
R
D
= 0
Ω.
These parameters, although ensured over the recommended operating conditions, are not 100% tested in production.
Collector off-state quiescent current measured at pin 13 with outputs low for UC1525A and high for UC1527A.
UC1525A Error Amplifier
15
+V
IN
Q3
Q4
Q1
Inv Input
NI Input
1
to PWM
Comparator
2
200
mA
100
mA
5.8 V
100
W
Q2
9
Comp
Copyright © 1997–2008, Texas Instruments Incorporated
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5
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