Data Sheet
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
HYB18M1G16[0/1]BF–6, HYE18M1G16[0/1]BF–6, HYB18M1G16[0/1]BF–7.5
Revision History: 2007-03, Rev.1.0
Page
52, 54
53
All
Subjects (major changes since last revision)
Tables updated
Table 21 updated
New Qimonda Template
Updates see Change List
Previous Revision: Rev. 0.61, 2007-02
Previous Revision: Rev. 0.60, 2006-11
Rev.1.0, 2007-03
10242006-Y557-TZXW
2
Data Sheet
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
1
1.1
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Overview
Features
Low power DDR 1Gbit x16 dual die implementation
Each die organized as 4 banks x 8 MBit x 16
2 KByte page size
Two Chip Selects (2 CS) for reducing power consumption
Options for one CKE and two CKEs are available. Option with second CKE provides futher power saving
Double-data-rate architecture: two data transfers per clock cycle
Bidirectional data strobe (DQS) is transmitted / received with data; to be used in capturing data at the receiver
DQS is edge-aligned with data for READs and center-aligned with data for WRITEs
Differential clock input (CK / CK)
Commands entered on positive CK edge; data and mask data are referenced to both edges of DQS
Four internal banks for concurrent operation
Programmable CAS latency: 2 and 3
Programmable burst length: 2, 4, 8 and 16
Programmable drive strength (full, half, quarter)
Auto refresh and self refresh modes
8192 refresh cycles / 64ms
Auto precharge
Commercial (-0°C to +70°C) and Extended (-25°C to +85°C) operating temperature ranges
60-ball PG-VFBGA-60-6 package (11
×
10.5
×
1.0 mm)
RoHS Compliant Product
1)
Power Saving Features
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Low supply voltages:
V
DD
= 1.70 V
−
1.90 V,
V
DDQ
= 1.70 V
−
1.90 V
Optimized operating (
I
DD0
,
I
DD4
), self refresh (
I
DD6
) and standby currents (
I
DD2
,
I
DD3
)
DDR I/O scheme with no DLL
Programmable Partial Array Self Refresh (PASR)
Temperature Compensated Self-Refresh (TCSR), controlled by on-chip temperature sensor
Clock Stop, Power-Down and Deep Power-Down modes
TABLE 1
Performance
Part Number Speed Code
Clock Frequency (
f
CKmax
)
Access Time (
t
ACmax
)
CL = 3
CL = 2
-6
166
83
5.5
66
6.5
- 7.5
133
MHz
MHz
ns
Unit
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Rev.1.0, 2007-03
10242006-Y557-TZXW
3
Data Sheet
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
TABLE 2
Memory Addressing Scheme
Item
Banks
Rows
Columns
Addresses
BA0, BA1
A0 - A12
A0 - A9
TABLE 3
Ordering Information
Type
1)
HYB18M1G160BF-6
HYB18M1G161BF-6
HYB18M1G160BF-7.5
HYB18M1G161BF-7.5
Extended Temperature Range
HYE18M1G160BF-6
HYE18M1G161BF-6
HYE18M1G160BF-7.5
HYE18M1G161BF-7.5
166 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, one CKE (CKE)
166 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, two CKE (CKE0 and CKE1)
133 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, one CKE (CKE)
133 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, two CKE (CKE0 and CKE1)
Description
166 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, one CKE (CKE)
166 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, two CKE (CKE0 and CKE1)
133 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, one CKE (CKE)
133 MHz 4 Banks
×
8 Mbit
×
16 Low Power DDR Mobile-RAM, two CKE (CKE0 and CKE1)
Commercial Temperature Range
1) HYB / HYE: Designator for memory products (HYB: standard temp. range; HYE: extended temp. range)
18M: 1.8V DDR Mobile-RAM
1G: 1Gbit density
160: 16 bit interface width; DDR-Mobile-RAM - One CKE (CKE)
161: 16 bit interface width; DDR-Mobile-RAM - Two CKE (CKE0 and CKE1)
B: die revision
F: green product
- 6/-7.5: speed grades (min. clock cycle time)
Rev.1.0, 2007-03
10242006-Y557-TZXW
4