The STK672-340-E is a unipolar fixed-current chopper type 2-phase stepping motor driver hybrid IC. It features power
MOSFETs in the output stage and a built-in phase signal distribution IC. The incorporation of a phase distribution IC
allows the STK672-340-E to control the speed of the motor based on the frequency of an external input clock signal.
It supports two types of excitation for motor control: 2-phase excitation and 1-2 phase excitation. It also provides a
function for switching the motor direction.
The STK672-340-E features an ENABLE pin, a function not provided in the STK672-120-E. When the ENABLE pin is
set low while the clock signal is being supplied, all MOSFET devices are forced to the off state. When ENABLE is set
high again later, the IC resumes operation, continuing with the prior excitation timing.
Applications
•
Two-phase stepping motor drive in send/receive facsimile units.
•
Paper feed in copiers, industrial robots, and other applications that require 2-phase stepping motor drive.
Semiconductor Components Industries, LLC, 2013
June, 2013
62911HKPC 5-6520/72308HKIM No.A1254-1/13
STK672-340-E
Features
•
The motor speed can be controlled by the frequency of an external clock signal (the CLOCK pin signal).
•
The excitation type is switched according to the state (low or high) of the MODE pin. The mode is set to 2-phase or
1-2 phase excitation on the rising edge of the clock signal.
•
A motor direction switching pin (the CWB pin) is provided.
•
Supports Schmitt input for 2.5V High level input.
•
The motor current can be set by changing the Vref pin voltage. Since a 0.14Ω current detection resistor is built in, a
current of 1A is set for each 0.14V of applied voltage.
•
The input frequency range for the clock signal used for motor speed control is 0 to 50kHz.
•
Supply voltage ranges: VCC = 10 to 42V, VDD = 5.0V
±5%
•
This IC supports motor operating currents of up to 2.2A at Tc = 105°C, and of up to 3.6A at Tc = 25°C.
•
Provides a function that, during clock input, forces all MOSFET devices to the off state when the ENABLE pin is set
low, and then, when ENABLE is set high, resumes operation continuing with the prior excitation timing.
Specifications
Absolute Maximum Ratings
at Tc = 25°C
Parameter
Maximum supply voltage 1
Maximum supply voltage 2
Input voltage
Output current
Allowable power dissipation
Operating substrate temperature
Junction temperature
Storage temperature
Symbol
VCC max
VDD max
VIN max
IOH max
Pd max
Tc max
Tj max
Tstg
No signal
No signal
Logic input pins
VDD = 5V, CLOCK
≥
200Hz
With an arbitrarily large heat sink. Per MOSFET
Conditions
Ratings
52
-0.3 to +7.0
-0.3 to +7.0
3.6
8
105
150
-40 to +125
Unit
V
V
V
A
W
°C
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Allowable Operating Ranges
at Ta = 25°C
Parameter
Operating supply voltage 1
Operating supply voltage 2
Input voltage
Output current 1
Output current 2
CLOCK frequency
Phase driver withstand voltage
Recommended operating substrate
temperature
Symbol
VCC
VDD
VIH
IOH1
IOH2
fCL
VDSS
Tc
Tc=105°C, CLOCK≥200Hz
Tc=80°C, CLOCK≥200Hz,
See the motor current (IOH) derating curve
Minimum pulse width: at least 10μs
ID=1mA (Tc=25°C)
No condensation
With signals applied
With signals applied
Conditions
Ratings
10 to 42
5.0±5%
0 to VDD
2.2
2.7
0 to 50
100min
0 to 105
unit
V
V
V
A
A
kHz
V
°C
Electrical Characteristics
at Tc = 25°C, VCC = 24V, VDD = 5V
Parameter
VDD supply current
Output average current
FET diode forward voltage
Output saturation voltage
Input high voltage
Input low voltage
Input current
Vref input voltage
Vref input bias current
PWM frequency
Symbol
ICCO
Ioave
Vdf
Vsat
VIH
VIL
IIL
VrH
IIB
fc
CLOCK=GND
With R/L=3Ω/3.8mH in each phase
Vref = 0.137V
If=1A (RL=23Ω)
RL=23Ω
Pins 8 to 12 (5 pins)
Pins 8 to 12 (5 pins)
With pins 8 to 12 at the ground level.
Pin 7
With pin 7 at 1V
35
0
50
45
2.5
0.6
10
3.5
500
55
0.52
Conditions
min
Rating
typ
3.1
0.58
1.1
0.31
max
7
0.64
1.7
0.44
mA
A
V
V
V
V
μA
V
nA
kHz
unit
Note: A fixed-voltage power supply must be used.
No.A1254-2/13
STK672-340-E
Package Dimensions
unit:mm (typ)
46.6
41.2
8.5
12.7
1
2.0
(9.6) 11 2=22
Internal Equivalent Circuit Block Diagram
A
5
VDD(5V)
6
VDD
F1
MODE
8
MODE
F2
F3
F4
AB
4
B
3
BB
2
Excitation mode
selection
Phase excitation
signal generation
Phase advance
counter
4.0
12
0.5
1.0
3.6
25.5
0.4
2.9
FAO
FAB
FBO
FBB
CLOCK
9
CLOCK
CWB 10
CWB
RESETB 11
RESETB
AI
RESETB
R1
R2
RESETB 12
Chopping
circuit
BI
CI
1
GND
VSS
Vref
7
ITF02169
No.A1254-3/13
STK672-340-E
Sample Application Circuit
STK672-340-E
10μF
VDD=5V
CO3
CLOCK
MODE
CWB
ENABLE
RO4
5V
5V
RO3
D1
+
10μF
CO4
RO1
Vref
0.1μF
RO2
CO1
ITF02170
+
6
9
5
8
10
12
4
AB
A
2-phase stepping motor
VCC
24V
20kΩ
RESETB
3
2
B
BB
+
CO2
At least 100μF
11
7
1
GND
P.GND
•
To minimize noise in the 5V system, locate the ground side of capacitor CO2 in the above circuit as close as possible
to pin 1 of the IC. Also, if at all possible, the ground used for Vref must not be common to the P.GND pattern, but
must be directly wired from pin 1.
•
Insert resistor RO3 (47 to 100Ω) so that the discharge energy from capacitor CO4 is not directly applied to the CMOS
IC in this hybrid device. If the diode D1 has Vf characteristics with Vf less than or equal to 0.6V (when If = 0.1A),
this will be smaller than the CMOS IC input pin diode Vf. If this is the case RO3 may be replaced with a short
without problem.
•
Apply 2.5V High level input to pins 8, 9, 10, 11, and 12.
•
Since the input pins do not have built-in pull-up resistors, when the open-collector type pins 8, 9, 10, 11, and 12 are
used as inputs, a 10 to 47kΩ pull-up resistor (to VDD) must be used.
•
To prevent incorrect operation due to chopping noise, we recommend inserting 470 to 1000pF capacitors between pin
1 and each of the pins 8, 9, 10, and 12.
(With the open-collector type IC, we also recommend inserting a 470 to 1000pF capacitor between pin 11 (RESETB)
and pin 1 when pin 11 is used as an input.)
•
The following circuit (for a lowered current of over 0.2A) is recommended if the application needs to temporarily
lower the motor current. Here, a value of close to 100kΩ must be used for resistor RO1 to make the transistor output
saturation voltage as low as possible.
5V
5V
RO1
Vref
RO1
RO3
RO2
RO3
RO2
Vref
ITF02171
ITF02172
No.A1254-4/13
STK672-340-E
•
Motor current peak value IOH setting
IOH
0
ITF02173
IOH = Vref
÷
Rs
Vref = (RO2
÷
(RO1 + RO2))
×
5V (or 3.3V)
Rs is the hybrid IC internal current detection resistor.
In the STK672-330-E (and STK672-350-E) Rs is 0.195Ω.
(In the STK672-340-E and STK672-360-E, Rs is 0.14Ω.)
Input Pin Functions
Pin Name
CLOCK
MODE
CWB
RESETB
Pin No.
9
8
10
11
Function
Reference clock for motor phase current switching
Excitation mode selection
Motor direction switching
System reset and A, AB, B, and BB outputs cutoff.
Applications must apply a reset signal for at least 10μs
when VDD is first applied.
ENABLE
12
The A, AB, B, and BB outputs are turned off, and after
operation is restored by returning the ENABLE pin to the
high level, operation continues with the same excitation
timing as before the low-level input.
The A, AB, B, and BB outputs are turned off by a low-
level input.
Input Conditions When Operating
Operates on the rising edge of the signal
Low: 2-phase excitation
High: 1-2 phase excitation
Low: CW (forward)
High: CCW (reverse)
A reset is applied by a low level
(1) A simple reset function is formed from D1, CO4, RO3, and RO4 in this application circuit. With the CLOCK input
held low, when the 5V supply voltage is brought up a reset is applied if the motor output phases A and BB are
driven. If the 5V supply voltage rise time is slow (over 50ms), the motor output phases A and BB may not be driven.
Increase the value of the capacitor CO4 and check circuit operation again.
(2) See the timing chart for the concrete details on circuit operation.
Usage Notes
1. STK672-340-E input signal functions and timing (Specifications common to the STK672-330-E as well)
(All inputs have no internal pull-up resistor.)
[RESETB and CLOCK (Input signal timing when power is first applied)]
As shown in the timing chart, a RESETB signal input is required by the driver to operate with the timing in which the
F1 gate is turned on first. The RESETB signal timing must be set up to have a width of at least 10μs, as shown below.
The capacitor CO4, and the resistors RO3 and RO4 in the application circuit form simple reset circuit that uses the
RC time constant rising time. However, when designing the RESETB input based on VIH levels, the application must
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