CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
6. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
V+ = V+
R
= V+
G
= V+
B
= +5V, V- = V-
R
= V-
G
= V-
B
= V-
D
= -5V, T
A
= +25°C, all registers at default settings
(equalizer stages set to minimum boost, noise filter set to max bandwidth, x2 gain mode, GAIN
DC
= 0dB), all analog inputs at 0V, auto offset
calibration executed, R
L
= 5pF || (75 + 75) to GND, thermal pad connected to -5V, unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7)
UNIT
POWER SUPPLY
Positive Supply
Voltage (V+)
Negative Supply
Voltage (V-)
Operating Current
(I
D
+)
Operating Current
(I
D
-)
Disabled Current
(I
D
+
DISABLED
)
Disabled Current
(I
D
-
DISABLED
)
PSRR
DC
BW
GAIN
100MHz
GAIN
20MHz
GAIN
6MHz
GAIN
1MHz
GAIN
0.2MHz
GAIN
DC
f
NOISE_MIN
f
NOISE_MAX
SR
DIFF
THD
V+ = V+
R
= V+
G
= V+
B
V- = V-
R
= V-
G
= V-
B
= V-
D
Sum of currents into all V+ pins
Sum of currents out of all V- pins,
including thermal pad
Sum of currents into all V+ pins
Sum of currents into all V- pins,
including thermal pad
Power Supply Rejection Ratio
ENABLE = 0V
ENABLE = 0V
4.5
-4.5
110
105
2.5
0.35
55
5.5
-5.5
140
130
3.5
2.5
V
V
mA
mA
mA
mA
dB
AC PERFORMANCE
Full Power Bandwidth
Maximum Boost @ 100MHz
Maximum Boost @ 20MHz
Maximum Boost @ 6MHz
Maximum Boost @ 1MHz
Maximum Boost @ 200kHz
DC Gain Adjustment Range
-3dB Corner Freq of Noise Filter, High
-3dB Corner Freq of Noise Filter, Low
Output Slew Rate
Total Harmonic Distortion
Noise Filter Register = 0x0
Noise Filter Register = 0xF
V
IN
= -1V to +1V
f = 10MHz, 0.7V
P-P
input sine wave
-45
All three 100MHz filters set to maximum
20MHz filter set to maximum
6MHz filter set to maximum
1MHz filter set to maximum
200kHz filter set to maximum
250
26
9.5
7.5
3.1
0.75
±4
250
50
1
-60
MHz
dB
dB
dB
dB
dB
dB
MHz
MHz
V/ns
dBc
FN7548 Rev 0.00
September 2, 2011
Page 4 of 17
ISL59911
Electrical Specifications
V+ = V+
R
= V+
G
= V+
B
= +5V, V- = V-
R
= V-
G
= V-
B
= V-
D
= -5V, T
A
= +25°C, all registers at default settings
(equalizer stages set to minimum boost, noise filter set to max bandwidth, x2 gain mode, GAIN
DC
= 0dB), all analog inputs at 0V, auto offset
calibration executed, R
L
= 5pF || (75 + 75) to GND, thermal pad connected to -5V, unless otherwise specified.
(Continued)
PARAMETER
BW
CM
SR
CM
CMIR
DESCRIPTION
Common Mode Amplifier Bandwidth
Common Mode Slew Rate
10k || 5pF load
V
IN
= -0.5V to +1.5V
Differential signal passed undistorted.
Effective headroom is reduced by the p-p
amplitude of differential swing divided by 2.
Measured at 100kHz
Measured at 10MHz
C
INDIFF
R
INDIFF
C
INCM
R
INCM
V
INDIFF_P-P
V
OUT
I
OUT
V(V
OUT
)
OS
R(V
CM
)
Gain
Gain
O
NOISE
SYNCOUT
HI
SYNCOUT
LO
Differential Input Capacitance
Differential Input Resistance
CM Input Capacitance
CM Input Resistance
Max P-P Differential Input Range
Capacitance between V
INP
and V
INM
Resistance between V
IN
+ and V
IN
-
(due to common mode input resistance)
Capacitance from V
IN
+ and V
IN
- to GND
Resistance from V
IN
+ and V
IN
- to GND
Delta V
IN
+ - V
IN
- when slope gain falls to 0.9
1.9
CONDITIONS
MIN
(Note 7)
TYP
24
0.1
MAX
(Note 7)
UNIT
MHz
V/ns
INPUT CHARACTERISTICS
Common-mode Input Range
-3.2/+4.0
V
CMRR
Common-mode Rejection Ratio
88
58
0.5
20
1.3
25
dB
dB
pF
k
pF
k
V
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Drive Current
Output Offset Voltage
R
L
= 10, V
IN
+ - V
IN
- = ±2V
Post-offset calibration
-20
±2.75
±22
-8
2.5
0.95
1.9
1.0
2.0
1.05
2.1
±3
4
20
V+ - 1.5
0.4
+5
V
mA
mV
V/V
%
mV
RMS
V
V
CM Output Resistance of VCM_R/G/B At 100kHz
(CM Output Mode)
Gain
Channel-to-Channel Gain Mismatch
Integrated Noise at Output
Inputs @ GND through 50.
High Level output on VS/HS
OUT
Low Level output on VS/HS
OUT
Maximum I
2
C Operating Frequency
SDA Output Low Level
Input High Level
Input Low Level
Input Hysteresis
Input Leakage Current
Maximum Width of Glitch on SCL (or
SDA) Guaranteed to be Rejected
50
V
SINK
= 6mA
3
x1 mode
x2 mode
x1 and x2 modes
0m of Equalization (Nominal)
300m of Equalization
10k || 5pF load, SYNC Output Mode
10k || 5pF load, SYNC Output Mode
SCL, SDA PINS
f
MAX
V
OL
V
IH
V
IL
V
HYST
I
LEAKAGE
t
GLITCH
400
0.4
1.5
0.55
±1
kHz
V
V
V
V
µA
ns
ENABLE, ADDR0, ADDR1 PINS
V
IH
V
IL
I
LEAKAGE
Input High Level
Input Low Level
Input Leakage Current
3
0.8
±1
V
V
µA
NOTE:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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