TC7MZ373FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC7MZ373FK
Low-Voltage Octal D-Type Latch with 5 V Tolerant Inputs and Outputs
The TC7MZ373FK is a high performance CMOS octal D-type
latch. Designed for use in 3.3 V systems, it achieves high speed
operation while maintaining the CMOS low power dissipation.
The device is designed for low-voltage (3.3 V) V
CC
applications,
but it could be used to interface to 5 V supply environment for
both inputs and outputs.
This 8 bit D-type latch is controlled by a latch enable input
(LE) and a output enable input (OE).
When the OE input is high, the eight outputs are in a high
impedance state.
All inputs are equipped with protection circuits against static
discharge.
Weight: 0.03 g (typ.)
Features
•
•
•
•
•
•
•
Low voltage operation: V
CC
= 2.0~3.6 V
High speed operation: t
pd
= 8.0 ns (max) (V
CC
= 3.0~3.6 V)
Output current: |I
OH
|/I
OL
= 24 mA (min) (V
CC
= 3.0 V)
Latch-up performance:
−500
mA
Package: VSSOP (US20)
Power down protection is provided on all inputs and outputs.
Pin and function compatible with the 74 series (74AC/VHC/HC/F/ALS/LS etc.) 373 type.
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2007-10-19
TC7MZ373FK
Pin Assignment
(top view)
IEC Logic Symbol
OE
LE
1
11
EN
C1
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
D0
D1
D2
D3
D4
D5
D6
D7
3
4
7
8
13
14
17
18
1D
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND 10
Truth Table
Inputs
Outputs
D
X
X
L
H
Z
Q
n
L
H
OE
H
L
L
L
LE
X
L
H
H
X: Don’t care
Z: High impedance
Q
n
: Q outputs are latched at the time when the LE inputs is taken to a low logic level.
System Diagram
D0
3
D
D1
4
D
D2
7
D
D3
8
D
D4
13
D
D5
14
D
D6
17
D
D7
18
D
LE
11
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
OE
1
2
Q0
5
Q1
6
Q2
9
Q3
12
Q4
15
Q5
16
Q6
19
Q7
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2007-10-19
TC7MZ373FK
Absolute Maximum Ratings
(Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
Power dissipation
DC V
CC
/ground current
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
P
D
I
CC
/I
GND
T
stg
Rating
−
0.5~7.0
−
0.5~7.0
−
0.5~7.0
Unit
V
V
(Note 2)
V
mA
(Note 4)
mA
mA
mW
mA
°C
−
0.5~V
CC
+
0.5 (Note 3)
−
50
±
50
±
50
180
±
100
−
65~150
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: Output in off-state
Note 3: High or low state. I
OUT
absolute maximum rating must be observed.
Note 4: V
OUT
<
GND, V
OUT
>
V
CC
Operating Ranges
(Note 1)
Characteristics
Supply voltage
Input voltage
Output voltage
Symbol
V
CC
V
IN
V
OUT
Rating
2.0~3.6
1.5~3.6 (Note 2)
0~5.5
0~5.5
0~V
CC
±
24
±
12
−
40~85
Unit
V
V
(Note 3)
(Note 4)
(Note 5)
(Note 6)
V
Output current
Operating temperature
Input rise and fall time
I
OH
/I
OL
T
opr
dt/dv
mA
°C
0~10
(Note 7)
ns/V
Note 1: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note 2: Data retention only
Note 3: Output in off state
Note 4: High or low state
Note 5: V
CC
=
3.0~3.6 V
Note 6: V
CC
=
2.7~3.0 V
Note 7: V
IN
=
0.8~2.0 V, V
CC
=
3.0 V
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2007-10-19
TC7MZ373FK
Electrical Characteristics
DC Characteristics
(Ta
= −40~85°C)
Characteristics
High level
Low level
Symbol
V
IH
V
IL
Test Condition
⎯
⎯
V
CC
(V)
2.7~3.6
2.7~3.6
2.7~3.6
2.7
3.0
3.0
2.7~3.6
2.7
3.0
3.0
2.7~3.6
2.7~3.6
0
2.7~3.6
2.7~3.6
2.7~3.6
Min
2.0
⎯
Max
⎯
Unit
Input voltage
V
0.8
⎯
⎯
⎯
⎯
I
OH
= −
100
μ
A
High level
V
OH
V
IN
=
V
IH
or V
IL
I
OH
= −
12 mA
I
OH
= −
18 mA
Output voltage
I
OH
= −
24 mA
I
OL
=
100
μ
A
Low level
V
OL
V
IN
=
V
IH
or V
IL
I
OL
=
12 mA
I
OL
=
16 mA
I
OL
=
24 mA
Input leakage current
3-state output off-state current
Power off leakage current
Quiescent supply current
Increase in I
CC
per input
I
IN
I
OZ
I
OFF
I
CC
Δ
I
CC
V
CC
−
0.2
2.2
2.4
2.2
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
V
0.2
0.4
0.4
0.55
±
5.0
±
5.0
μ
A
μ
A
μ
A
V
IN
=
0~5.5 V
V
IN
=
V
IH
or V
IL
V
OUT
=
0~5.5 V
V
IN
/V
OUT
=
0~5.5 V
V
IN
=
V
CC
or GND
V
IN
/V
OUT
=
3.6~5.5 V
V
IH
=
V
CC
−
0.6 V
10.0
10.0
±
10.0
μ
A
500
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2007-10-19
TC7MZ373FK
AC Characteristics
(Ta
= −40~85°C)
Characteristics
Symbol
t
pLH
t
pHL
t
pLH
t
pHL
t
pZL
t
pZH
t
pLZ
t
pHZ
t
w (H)
t
w (L)
t
s
Test Condition
V
CC
(V)
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
(Note)
2.7
3.3
±
0.3
Min
⎯
Max
9.0
8.0
9.5
8.5
9.5
8.5
8.5
7.5
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Unit
Propagation delay time (D-Q)
Figure 1, Figure 2
1.5
⎯
ns
Propagation delay time (LE-Q)
Figure 1, Figure 2
1.5
⎯
ns
Output enable time
Figure 1, Figure 3
1.5
⎯
ns
Output disable time
Figure 1, Figure 3
1.5
4.0
3.3
2.5
2.5
1.5
1.5
⎯
⎯
ns
Minimum pulse width (LE)
Figure 1, Figure 2
ns
Minimum set-up time
Figure 1, Figure 2
ns
Minimum hold time
t
h
t
osLH
t
osHL
Figure 1, Figure 2
ns
Output to output skew
1.0
ns
Note: This parameter is guaranteed by design.
(t
osLH
=
|t
pLHm
−
t
pLHn
|, t
osHL
=
|t
pHLm
−
t
pHLn
|)
Dynamic Switching Characteristics
(Ta
=
25°C, Input: t
r
=
t
f
=
2.5 ns, C
L
=
50 pF, R
L
=
500
Ω)
Characteristics
Quiet output maximum dynamic
Quiet output minimum dynamic
V
OL
V
OL
Symbol
V
OLP
|V
OLV
|
Test Condition
V
IH
=
3.3 V, V
IL
=
0 V
V
IH
=
3.3 V, V
IL
=
0 V
V
CC
(V)
3.3
3.3
Typ.
0.8
0.8
Unit
V
V
Capacitive Characteristics
(Ta
=
25°C)
Characteristics
Input capacitance
Output capacitance
Power dissipation capacitance
Symbol
C
IN
C
OUT
C
PD
f
IN
=
10 MHz
Test Condition
⎯
⎯
V
CC
(V)
3.3
3.3
(Note)
3.3
Typ.
7
8
25
Unit
pF
pF
pF
Note: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption.
Average operating current can be obtained by the equation:
ICC (opr)
=
C
PD
½V
CC
½f
IN
+
I
CC
/8 (per bit)
5
2007-10-19
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