TC74LVX02F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74LVX02F,TC74LVX02FN,TC74LVX02FT
Quad 2-Input NOR Gate
Note:
xxxFN (JEDEC SOP) is not available in
Japan.
The TC74LVX02F/ FN/ FT is a high-speed CMOS 2-input NOR
gate fabricated with silicon gate CMOS technology. Designed for
use in 3-V systems, it achieves high-speed operation while
maintaining the CMOS low power dissipation.
This device is suitable for low-voltage and battery operated
systems.
The internal circuit is composed of 3 stages including buffer
output, which provide high noise immunity and stable output.
An input protection circuit ensures that 0 to 5.5V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
TC74LVX02F
TC74LVX02FN
Features
•
•
•
•
•
•
•
High-speed: t
pd
=
4.5 ns (typ.) (V
CC
=
3.3 V)
Low-power dissipation: I
CC
=
2
μA
(max) (Ta
=
25°C)
Input voltage level: V
IL
=
0.8 V (max) (V
CC
=
3 V)
V
IH
=
2.0 V (min) (V
CC
=
3 V)
Power-down protection provided on all inputs
Balanced propagation delays: t
pLH
∼
t
pHL
−
Low noise: V
OLP
=
0.5 V (max)
Pin and function compatible with 74HC02
TC74LVX02FT
Weight
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
1
2007-10-17
TC74LVX02F/FN/FT
Pin Assignment
(top view)
IEC Logic Symbol
1A
1B
2A
2B
3A
3B
4A
4B
(2)
(3)
(5)
(6)
(8)
(9)
(11)
(12)
>
1
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4Y
4B
4A
3Y
3B
3A
(1)
(4)
(10)
(13)
1Y
2Y
3Y
4Y
Truth Table
Inputs
A
L
L
H
H
B
L
H
L
H
Outputs
Y
H
L
L
L
Absolute Maximum Ratings
(Note)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to 7.0
−0.5
to V
CC
+
0.5
−20
±20
±25
±50
180
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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2007-10-17
TC74LVX02F/FN/FT
Operating Ranges
(Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dv
Rating
2.0 to 3.6
0 to 5.5
0 to V
CC
−40
to 85
0 to 100
Unit
V
V
V
°C
ns/V
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Electrical Characteristics
DC Characteristics
Characteristics
Symbol
Test Condition
V
CC
(V)
2.0
H-level
Input voltage
L-level
V
IL
⎯
V
IH
⎯
3.0
3.6
2.0
3.0
3.6
I
OH
= −50 μA
H-level
Output voltage
L-level
V
OL
V
OH
V
IN
=
V
IL
I
OH
= −50 μA
I
OH
= −4
mA
V
IN
=
V
IH
I
OL
=
50
μA
or V
IL
I
OL
=
4 mA
V
IN
=
5.5 V or GND
V
IN
=
V
CC
or GND
I
OL
=
50
μA
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
Min
1.5
2.0
2.4
⎯
⎯
⎯
1.9
2.9
2.58
⎯
⎯
⎯
⎯
⎯
Ta
=
25°C
Typ.
⎯
⎯
⎯
⎯
⎯
⎯
2.0
3.0
⎯
0
0
⎯
⎯
⎯
Max
⎯
⎯
⎯
0.5
0.8
0.8
⎯
⎯
⎯
0.1
0.1
0.36
±0.1
2.0
Ta
= −40
to
85°C
Min
1.5
2.0
2.4
⎯
⎯
⎯
1.9
2.9
2.48
⎯
⎯
⎯
⎯
⎯
Max
⎯
⎯
⎯
0.5
0.8
0.8
⎯
⎯
⎯
0.1
0.1
0.44
±1.0
20.0
μA
μA
V
V
Unit
Input leakage current
Quiescent supply current
I
IN
I
CC
3
2007-10-17
TC74LVX02F/FN/FT
AC Characteristics
(input: t
r
=
t
f
=
3 ns)
Characteristics
Symbol
Test Condition
V
CC
(V)
t
pLH
Propagation delay time
t
pHL
t
osLH
t
osHL
C
IN
C
PD
⎯
3.3
±
0.3
2.7
3.3
±
0.3
2.7
C
L
(pF)
15
50
15
50
50
50
(Note 2)
(Note 3)
Min
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Ta
=
25°C
Typ.
5.9
8.4
4.5
7.0
⎯
⎯
4
15
Max
10.7
14.2
6.6
10.1
1.5
1.5
10
⎯
Ta
= −40
to
85°C
Min
1.0
1.0
1.0
1.0
⎯
⎯
⎯
⎯
Max
13.5
17.0
8.0
11.5
1.5
1.5
10
⎯
ns
pF
pF
ns
Unit
Output to output skew
Input capacitance
Power dissipation capacitance
(Note 1)
Note 1: Parameter guaranteed by design.
(t
osLH
=
|t
pLHm
−
t
pLHn
|, t
osHL
=
|t
pHLm
−
t
pHLn
|)
Note 2: Parameter guaranteed by design.
Note 3: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption.
Average operating current can be obtained by the equation:
I
CC (opr)
=
C
PD
½V
CC
½f
IN
+
I
CC
/4 (per gate)
Noise Characteristics
(Ta
=
25°C, input: t
r
=
t
f
=
3 ns, C
L
=
50 pF)
Characteristics
Quiet output maximum dynamic V
OL
Quiet output minimum dynamic V
OL
Minimum high level dynamic input
voltage V
IH
Maximum low level dynamic input
voltage V
IL
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Test Condition
⎯
⎯
⎯
⎯
V
CC
(V)
3.3
3.3
3.3
3.3
Typ.
0.3
−0.3
⎯
⎯
Limit
0.5
−0.5
2.0
0.8
Unit
V
V
V
V
Input Equivalent Circuit
INPUT
4
2007-10-17
TC74LVX02F/FN/FT
Package Dimensions
Weight: 0.18 g (typ.)
5
2007-10-17
Microcontroller MCU
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