TC74HCT08AP datasheet, PDF - EEWORLD Datasheet

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TC74HCT08AP: DescriptionQuad 2-Input AND Gate; Categorylogic logic; File Size249KB，7 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/; Environmental Compliance

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TC74HCT08AP Overview

Quad 2-Input AND Gate

TC74HCT08AP Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Toshiba Semiconductor
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknow
series	HCT
JESD-30 code	R-PDIP-T14
length	19.25 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND GATE
MaximumI(ol)	0.004 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Su	25 ns
propagation delay (tpd)	25 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	4.45 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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TC74HCT08AP/AF/AFN

TOSHIBA CMOS Digital Integrated Circuit

Silicon Monolithic

TC74HCT08AP,TC74HCT08AF,TC74HCT08AFN

Quad 2-Input AND Gate

The TC74HCT08A is a high speed CMOS 2-INPUT AND

GATE fabricated with silicon gate C

MOS technology.

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

This device may be used as a level converter for interfacing

TTL or NMOS to High Speed CMOS. The inputs are compatible

with TTL, NMOS and CMOS output voltage levels.

The internal circuit is composed of 4-stages including buffer

output, which provide high noise immunity and stable output.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Note: xxxFN (JEDEC SOP) is not available in

Japan.

TC74HCT08AP

TC74HCT08AF

Features

•

High speed: t

= 10 ns (typ.) at V

= 5 V

Low power dissipation: I

= 1

μA

(max) at Ta = 25°C

Compatible with TTL outputs: V

= 2 V (min)

= 0.8 V (max)

Wide interfacing ability: LSTTL, NMOS, CMOS

Output drive capability: 10 LSTTL loads

Symmetrical output impedance: |I

| = I

= 4 mA (min)

∼

Balanced propagation delays: t

pLH

−

pHL

Pin and function compatible with 74LS08

TC74HCT08AFN

Pin Assignment

Weight

DIP14-P-300-2.54

SOP14-P-300-1.27A

SOL14-P-150-1.27

: 0.96 g (typ.)

: 0.18 g (typ.)

: 0.12 g (typ.)

2007-10-01

TC74HCT08AP Related Products

	TC74HCT08AP	TC74HCT08AF	TC74HCT08AFN	TC74HCT08AP_07
Description	Quad 2-Input AND Gate	Quad 2-Input AND Gate	Quad 2-Input AND Gate	Quad 2-Input AND Gate
Is it Rohs certified?	conform to	incompatible	conform to	-
Parts packaging code	DIP	SOIC	SOIC	-
package instruction	DIP, DIP14,.3	0.300 INCH, 1.27 MM PITCH, LEAD FREE, PLASTIC, SOP-14	SOP, SOP14,.25	-
Contacts	14	14	14	-
Reach Compliance Code	unknow	unknow	unknow	-
series	HCT	HCT	HCT	-
JESD-30 code	R-PDIP-T14	R-PDSO-G14	R-PDSO-G14	-
length	19.25 mm	10.3 mm	8.65 mm	-
Load capacitance (CL)	50 pF	50 pF	50 pF	-
Logic integrated circuit type	AND GATE	AND GATE	AND GATE	-
MaximumI(ol)	0.004 A	0.004 A	0.004 A	-
Number of functions	4	4	4	-
Number of entries	2	2	2	-
Number of terminals	14	14	14	-
Maximum operating temperature	85 °C	85 °C	85 °C	-
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	DIP	SOP	SOP	-
Encapsulate equivalent code	DIP14,.3	SOP14,.3	SOP14,.25	-
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	-
Package form	IN-LINE	SMALL OUTLINE	SMALL OUTLINE	-
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
power supply	5 V	5 V	5 V	-
Prop。Delay @ Nom-Su	25 ns	25 ns	25 ns	-
propagation delay (tpd)	25 ns	25 ns	25 ns	-
Certification status	Not Qualified	Not Qualified	Not Qualified	-
Schmitt trigger	NO	NO	NO	-
Maximum seat height	4.45 mm	1.9 mm	1.75 mm	-
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	-
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	-
Nominal supply voltage (Vsup)	5 V	5 V	5 V	-
surface mount	NO	YES	YES	-
technology	CMOS	CMOS	CMOS	-
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	-
Terminal form	THROUGH-HOLE	GULL WING	GULL WING	-
Terminal pitch	2.54 mm	1.27 mm	1.27 mm	-
Terminal location	DUAL	DUAL	DUAL	-
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
width	7.62 mm	5.3 mm	3.9 mm	-

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