Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10
µ
A (Max.) @ V
DS
= 200V
Lower R
DS(ON)
: 0.144
Ω
(Typ.)
1
IRFP240A
BV
DSS
= 200 V
R
DS(on)
= 0.18
Ω
I
D
= 20 A
TO-3P
2
3
1.Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
Characteristic
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25
o
C)
Continuous Drain Current (T
C
=100
o
C )
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
C
=25
o
C)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
2
O
1
O
1
O
3
O
Value
200
20
12.7
1
O
Units
V
A
A
V
mJ
A
mJ
V/ns
W
W/
C
o
80
+ 30
_
267
20
18
5.0
180
1.45
- 55 to +150
o
C
300
Thermal Resistance
Symbol
R
θ
JC
R
θ
CS
R
θ
JA
Characteristic
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
Typ.
--
0.24
--
Max.
0.69
--
40
o
Units
C/W
Rev. B
©1999 Fairchild Semiconductor Corporation
IRFP240A
Symbol
BV
DSS
∆
BV/
∆
T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain(“Miller”) Charge
Min. Typ. Max. Units
200
--
2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.26
--
--
--
--
--
--
10.01
210
94
17
16
48
24
44
10.4
27.1
--
--
4.0
100
-100
10
100
0.18
--
250
110
40
40
110
60
58
--
--
nC
ns
µ
A
Ω
Ω
pF
V
V
nA
N-CHANNEL
POWER MOSFET
Electrical Characteristics
(T
C
=25
o
C unless otherwise specified)
Test Condition
V
GS
=0V,I
D
=250
µ
A
See Fig 7
V
DS
=5V,I
D
=250
µ
A
V
GS
=30V
V
GS
=-30V
V
DS
=200V
V
DS
=160V,T
C
=125 C
V
GS
=10V,I
D
=10A
V
DS
=40V,I
D
=10A
4
O
4
O
o
o
V/ C I
D
=250
µ
A
1160 1500
V
GS
=0V,V
DS
=25V,f =1MHz
See Fig 5
V
DD
=100V,I
D
=18A,
R
G
=9.1
Ω
See Fig 13
V
DS
=160V,V
GS
=10V,
I
D
=18A
See Fig 6 & Fig 12
4
5
OO
4
5
OO
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
1
O
4
O
Min. Typ. Max. Units
--
--
--
--
--
--
--
--
195
1.35
20
80
1.5
--
--
A
V
ns
µ
C
Test Condition
Integral reverse pn-diode
in the MOSFET
T
J
=25
o
C,I
S
=20A,V
GS
=0V
T
J
=25
o
C ,I
F
=18A
di
F
/dt=100A/
µ
s
4
O
Notes ;
1
O
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2
O
L=1mH, I
AS
=20A, V
DD
=50V, R
G
=27
Ω
, Starting T
J
=25
o
C
3
<
_
<
O
I
SD
_
18A, di/dt
_
260A/
µ
s, V
DD
<
BV
DSS
, Starting T
J
=25
o
C
_
4
Pulse Test : Pulse Width = 250
µ
s, Duty Cycle
<
2%
O
5
O
Essentially Independent of Operating Temperature
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics
V
GS
IRFP240A
Fig 2. Transfer Characteristics
[A]
I
D
, Drain Current
10
1
I
D
, Drain Current
[A]
Top :
10
1
15V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150
o
C
10
0
25
o
C
@ Notes :
1. V = 0 V
GS
2. V = 40 V
DS
- 55 C
o
10
0
10
-1
@ Notes :
1. 250
µ
s Pulse Test
2. T = 25
o
C
C
10
0
10
1
3. 250
µ
s Pulse Test
6
8
10
10
-1
10
-1
2
4
V
DS
, Drain-Source Voltage [V]
[A]
V
GS
, Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
R
DS(on)
, [ ]
Ω
Drain-Source On-Resistance
04
.
Fig 4. Source-Drain Diode Forward Voltage
03
.
V
GS
= 10 V
I
DR
, Reverse Drain Current
1
1
0
02
.
1
0
0
@Nts:
oe
1 V
GS
= 0 V
.
2
o
C
5
1
-1
0
02
.
04
.
06
.
08
.
10
.
12
.
2 2 0
µ
s P l e T s
. 5
us et
14
.
16
.
18
.
20
.
01
.
V
GS
= 20 V
@ N t : T
J
= 2
o
C
oe
5
00
.
0
20
40
60
8
0
10 C
5
o
I
D
, Drain Current [A]
V
SD
, Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
20
00
C
iss
= C
gs
+ C ( C
ds
= s o t d )
hre
gd
C
oss
= C
ds
+ C
gd
Fig 6. Gate Charge vs. Gate-Source Voltage
[V]
V
DS
= 4 V
0
0
V
DS
= 1 0 V
V
DS
= 1 0 V
6
[pF]
10
50
C
iss
10
00
C
oss
50
0
@Nts:
oe
1 V
GS
= 0 V
.
2 f=1Mz
.
H
C
rss
V
GS
, Gate-Source Voltage
C
rss
= C
gd
1
0
Capacitance
5
@ N t s : I
D
= 1 . A
oe
80
0
0
1
0
2
0
3
0
4
0
5
0
0
0
1
0
1
10
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
IRFP240A
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
N-CHANNEL
POWER MOSFET
Fig 8. On-Resistance vs. Temperature
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
3.0
Fig 7. Breakdown Voltage vs. Temperature
1.2
2.5
1.1
2.0
1.0
1.5
1.0
@ Notes :
1. V = 10 V
GS
2. I = 9.0 A
D
0.9
@ Notes :
1. V = 0 V
GS
2. I = 250
µ
A
D
0.5
0.8
-75
-50
-25
0
25
50
75
100
o
125
150
175
0.0
-75
-50
-25
0
25
50
75
100
o
125
150
175
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
[A]
Operation in This Area
is Limited by R
DS(on)
2
10
Fig 10. Max. Drain Current vs. Case Temperature
25
[A]
100
µ
s
1 ms
10 ms
I
D
, Drain Current
I
D
, Drain Current
20
15
1
10
DC
10
0
10
@ Notes :
1. T = 25
o
C
C
2. T = 150
o
C
J
3. Single Pulse
5
10
-1
0
10
1
10
10
2
0
25
50
75
100
125
150
V
DS
, Drain-Source Voltage [V]
T
c
, Case Temperature [
o
C]
Fig 11. Thermal Response
10
0
Thermal Response
D=0.5
0.2
10
- 1
0.1
0.05
0.02
0.01
10
-2
@ Notes :
1. Z
θ
J C
(t)=0.69
3. T
J M
-T
C
=P
D M
*Z
o
C/W Max.
(t)
2. Duty Factor, D=t /t
2
1
θ
JC
Z
JC
(t) ,
P
DM
single pulse
t
1
t
2
θ
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
10
0
10
1
t
1
, Square Wave Pulse Duration
[sec]
N-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
IRFP240A
“ Current Regulator ”
50KΩ
12V
200nF
300nF
Same Type
as DUT
V
GS
Q
g
10V
V
DS
V
GS
DUT
3mA
Q
gs
Q
gd
R
1
Current Sampling (I
G
)
Resistor
R
2
Current Sampling (I
D
)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
R
L
V
out
V
in
R
G
DUT
10V
V
in
10%
V
out
V
DD
( 0.5 rated V
DS
)
90%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
L
V
DS
Vary t
p
to obtain
required peak I
D
BV
DSS
1
2
--------------------
E
AS
= ---- L
L
I
AS
2
BV
DSS
-- V
DD
BV
DSS
I
AS
C
V
DD
V
DD
t
p
I
D
R
G
DUT
10V
t
p
I
D
(t)
V
DS
(t)
Time
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