TC74VCX164245FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VCX164245FT
16-Bit Dual Supply Bus Transceiver
The TC74VCX164245FT is a dual supply, advanced high-speed
CMOS 16-bit bus transceiver fabricated with silicon gate CMOS
technology.
It is also designed with over voltage tolerant inputs and outputs up
to 3.6 V.
Designed for use as an interface between a 3.3-V or 2.5-V bus
and a 2.5-V or 1.8-V bus in mixed 3.3-V or 2.5-V/2.5-V or 1.8-V
supply systems.
The B-port interfaces with the 3.3-V or 2.5-V bus, the A-port with
the 2.5-V or 1.8-V bus.
Weight: 0.25 g (typ.)
The direction of data transmission is determined by the level of the
DIR input. The enable input (
OE
) can be used to disable the device
so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
Features (Note)
•
•
•
•
•
Bidirectional interface between 3.3 V and 2.5 V, 3.3 V and 1.8 V, 2.5 V and 1.8 V
High-speed: t
pd
= 4.6 ns (max) (V
CCB
= 3.3 ± 0.3 V, V
CCA
= 2.5 ± 0.2 V)
t
pd
= 7.1 ns (max) (V
CCB
= 3.3 ± 0.3 V, V
CCA
= 1.8 ± 0.15 V)
t
pd
= 7.0 ns (max) (V
CCB
= 2.5 ± 0.2 V, V
CCA
= 1.8 ± 0.15 V)
Output current: I
OH
/ I
OL
= ±24 mA (min) (V
CC
= 3.0 V)
: I
OH
/ I
OL
= ±18 mA (min) (V
CC
= 2.3 V)
: I
OH
/ I
OL
= ±6 mA (min) (V
CC
= 1.65 V)
•
•
•
•
Latch-up performance:
−300
mA
ESD performance: Machine model
≥ ±200
V
Human body model
≥ ±2000
V
Package: TSSOP
3.6-V tolerant function and power-down protection provided on all inputs and outputs
Note:
Do not apply a signal to any bus pins when it is in the output mode. Damage may result.
All floating (high impedance) bus pins must have their input level fixed by means of pull-up or pull-down
resistors.
Start of commercial production
2001-06
1
2014-03-01
TC74VCX164245FT
Absolute Maximum Ratings (Note 1)
Characteristics
Power supply voltage
DC input voltage
(DIR,
OE
)
(Note 2)
Symbol
V
CCB
V
CCA
V
IN
Rating
−
0.5 to 4.6
−
0.5 to V
CCB
−
0.5 to 4.6
−
0.5 to 4.6 (Note 3)
Unit
V
V
V
I/OB
DC bus I/O voltage
V
I/OA
−
0.5 to V
CCB
+
0.5
(Note 4)
−
0.5 to 4.6 (Note 3)
−
0.5 to V
CCA
+
0.5
V
(Note 4)
Input diode current
Output diode current
DC output current
I
IK
I
I/OK
I
OUTB
I
OUTA
I
CCB
I
CCA
P
D
T
stg
−
50
±
50
±
50
±
50
±
100
±
100
mA
(Note 5)
mA
mA
DC V
CC
/ground current per supply pin
Power dissipation
Storage temperature
mA
mW
°
C
400
−
65 to 150
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: Don’t supply a voltage to V
CCA
terminal when V
CCB
is in the off-state.
Note 3: OFF state
Note 4: High or low state. I
OUT
absolute maximum rating must be observed.
Note 5: V
OUT
<
GND, V
OUT
>
V
CC
5
2014-03-01