INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT7541
Octal Schmitt trigger buffer/line
driver; 3-state
Product specification
Supersedes data of March 1988
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Octal Schmitt trigger buffer/line driver; 3-state
FEATURES
•
Non-inverting outputs
•
Schmitt trigger action on all data inputs
•
Output capability: bus driver
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT7541 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT7541
The 74HC/HCT7541 are octal Schmitt trigger
non-inverting buffer/line drivers with 3-state outputs. The
3-state outputs are controlled by the output enable inputs
OE
1
and OE
2
.
A HIGH on OE
n
causes the outputs to assume a high
impedance OFF-state.
The Schmitt trigger action in the data inputs transforms
slowly changing input signals into sharply defined
jitter-free output signals.
The “7541” is identical to the “541” but has hysteresis on
the data inputs.
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay A
n
to Y
n
input capacitance
power dissipation capacitance per buffer
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
10
3.5
30
HCT
16
3.5
32
ns
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
Octal Schmitt trigger buffer/line driver; 3-state
PIN DESCRIPTION
PIN NO.
1, 19
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
20
SYMBOL
OE
1
, OE
2
A
0
to A
7
GND
Y
0
to Y
7
V
CC
NAME AND FUNCTION
74HC/HCT7541
output enable inputs (active LOW)
data inputs
ground (0 V)
bus outputs
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Octal Schmitt trigger buffer/line driver; 3-state
FUNCTION TABLE
INPUTS
OE
1
L
L
X
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
OE
2
L
L
H
X
A
n
L
H
X
X
OUTPUTS
Y
n
L
H
Z
Z
74HC/HCT7541
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
4
Philips Semiconductors
Product specification
Octal Schmitt trigger buffer/line driver; 3-state
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Transfer characteristics are given below (not applicable for OE
n
inputs).
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL
PARAMETER
+25
−40
to
+85
−40
to
+125
max.
180
36
32
240
48
41
240
48
41
90
18
15
ns
74HC/HCT7541
TEST CONDITIONS
UNIT V
CC
WAVEFORMS
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.8
min. typ. max. min. max. min.
t
PHL
/ t
PLH
propagation delay
A
n
to Y
n
3-state output enable time
OE
n
to Y
n
3-state output disable time
OE
n
to Y
n
output transition time
39
14
11
44
16
13
58
21
17
14
5
4
120
24
20
160
32
27
160
32
27
60
12
10
150
30
26
200
40
34
200
40
34
75
15
13
t
PZH
/ t
PZL
ns
Fig.8
t
PHZ
/ t
PLZ
ns
Fig.8
t
THL
/ t
TLH
ns
Fig.8
TRANSFER CHARACTERISTICS FOR 74HC
Voltages are referred to GND (ground = 0 V)
T
amb
(°C)
74HC
SYMBOL PARAMETER
+25
−40
to
+85
−40
to
+125
UNIT V
CC
WAVEFORMS
(V)
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Figs 6 and 7
TEST CONDITIONS
min. typ. max. min. max. min. max.
V
T+
positive-going threshold
1.50
3.15
4.20
0.30
1.35
1.80
0.10
0.25
0.30
0.20
0.40
0.50
0.30
1.35
1.80
0.10
0.25
0.30
1.50
3.15
4.20
0.30
1.35
1.80
0.10
0.25
0.30
1.50
3.15
4.20
V
T−
negative-going threshold
V
Figs 6 and 7
V
H
hysteresis (V
T+
−
V
T−
)
V
Figs 6 and 7
December 1990
5