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IDT7143SA55JG

Description
Dual-Port SRAM, 2KX16, 55ns, CMOS, PQCC68, 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-68
Categorystorage    storage   
File Size133KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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IDT7143SA55JG Overview

Dual-Port SRAM, 2KX16, 55ns, CMOS, PQCC68, 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-68

IDT7143SA55JG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeLCC
package instructionQCCJ,
Contacts68
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time55 ns
JESD-30 codeS-PQCC-J68
JESD-609 codee3
length24.2062 mm
memory density32768 bit
Memory IC TypeDUAL-PORT SRAM
memory width16
Number of functions1
Number of terminals68
word count2048 words
character code2000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize2KX16
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height4.572 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width24.2062 mm
Base Number Matches1
HIGH SPEED
2K X 16 DUAL-PORT
SRAM
Features
IDT7133SA/LA
IDT7143SA/LA
High-speed access
– Military: 25/35/45/55/70/90ns (max.)
– Industrial: 25/35/55ns (max.)
– Commercial: 20/25/35/45/55/70/90ns (max.)
Low-power operation
– IDT7133/43SA
Active: 1150mW (typ.)
Standby: 5mW (typ.)
– IDT7133/43LA
Active: 1050mW (typ.)
Standby: 1mW (typ.)
Versatile control for write: separate write control for lower
and upper byte of each port
MASTER IDT7133 easily expands data bus width to 32 bits
or more using SLAVE IDT7143
On-chip port arbitration logic (IDT7133 only)
BUSY
output flag on IDT7133;
BUSY
input on IDT7143
Fully asynchronous operation from either port
Battery backup operation–2V data retention
TTL-compatible; single 5V (±10%) power supply
Available in 68-pin ceramic PGA, Flatpack, PLCC and 100-
pin TQFP
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Description
The IDT7133/7143 are high-speed 2K x 16 Dual-Port Static RAMs.
The IDT7133 is designed to be used as a stand-alone 16-bit Dual-Port
Functional Block Diagram
R/W
LUB
CE
L
R/W
RUB
CE
R
R/W
LLB
OE
L
R/W
RLB
OE
R
I/O
8L
- I/O
15L
I/O
0L
- I/O
7L
BUSY
L
(1)
A
10L
A
0L
ADDRESS
DECODER
11
I/O
CONTROL
I/O
CONTROL
I/O
8R
- I/O
15R
I/O
0R
- I/O
7R
BUSY
R
(1)
MEMORY
ARRAY
ADDRESS
DECODER
11
A
10R
A
0R
CE
L
ARBITRATION
LOGIC
(IDT7133 ONLY)
CE
R
2746 drw 01
NOTE:
1. IDT7133 (MASTER):
BUSY
is open drain output and requires pull-up resistor.
IDT7143 (SLAVE):
BUSY
is input.
JANUARY 2006
1
©2006 Integrated Device Technology, Inc.
DSC 2746/12

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