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74F132SC

Description
Quad 2-Input NAND Schmitt Trigger
Categorylogic    logic   
File Size176KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74F132SC Overview

Quad 2-Input NAND Schmitt Trigger

74F132SC Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP14,.25
Contacts14
Reach Compliance Codeunknow
seriesF/FAST
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length8.65 mm
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.02 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply5 V
Maximum supply current (ICC)18 mA
Prop。Delay @ Nom-Su13 ns
propagation delay (tpd)13 ns
Certification statusNot Qualified
Schmitt triggerYES
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
Base Number Matches1
74F132 Quad 2-Input NAND Schmitt Trigger
May 2007
74F132
Quad 2-Input NAND Schmitt Trigger
General Description
The F132 contains four 2-input NAND gates which
accept standard TTL input signals and provide standard
TTL output levels. They are capable of transforming
slowly changing input signals into sharply defined, jitter-
free output signals. In addition, they have a greater noise
margin than conventional NAND gates.
Each circuit contains a 2-input Schmitt Trigger followed
by level shifting circuitry and a standard FAST
output
structure. The Schmitt Trigger uses positive feedback to
effectively speed-up slow input transitions, and provide
different input threshold voltages for positive and
negative-going transitions. This hysteresis between the
positive-going and negative-going input threshold (typi-
cally 800mV) is determined by resistor ratios and is
essentially insensitive to temperature and supply voltage
variations.
tm
Ordering Information
Order
Number
74F132SC
74F132SJ
Package
Number
M14A
M14D
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number.
Connection Diagram
Logic Symbol
IEEE/IEC
Unit Loading/Fan Out
Pin
U.L.
Input I
IH
/I
IL
,
Names Description HIGH/LOW Output I
OH
/I
OL
A
n
, B
n
O
n
Inputs
Outputs
1.0 / 1.0
50 / 33.3
20µA / –0.6mA
–1mA / 20mA
Function Table
Inputs
A
L
L
H
H
Outputs
B
L
H
L
H
O
H
H
H
L
H
=
HIGH Voltage Level
FAST
®
is a registered trademark of Fairchild Semiconductor Corporation.
©1988 Fairchild Semiconductor Corporation
74F132 Rev. 1.3
L
=
LOW Voltage Level
www.fairchildsemi.com

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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