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5962-9315601HXA

Description
SRAM Module, 128KX8, 120ns, CMOS, CDIP32, DUAL CAVITY, BOTTOM BRAZED, HERMETIC SEALED, CERAMIC, DIP-32
Categorystorage    storage   
File Size217KB,20 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

5962-9315601HXA Overview

SRAM Module, 128KX8, 120ns, CMOS, CDIP32, DUAL CAVITY, BOTTOM BRAZED, HERMETIC SEALED, CERAMIC, DIP-32

5962-9315601HXA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionDUAL CAVITY, BOTTOM BRAZED, HERMETIC SEALED, CERAMIC, DIP-32
Reach Compliance Codeunknown
Maximum access time120 ns
I/O typeCOMMON
JESD-30 codeR-CDIP-T32
JESD-609 codee0
length40.6 mm
memory density1048576 bit
Memory IC TypeSRAM MODULE
memory width8
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX8
Output characteristics3-STATE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP32,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Maximum seat height5.1 mm
Maximum standby current0.0004 A
Minimum standby current3 V
Maximum slew rate0.03 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb) - hot dipped
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width15.24 mm
Base Number Matches1
REVISIONS
LTR
A
B
DESCRIPTION
Added Case outline Y. Changes to table I.
Added note to paragraph 1.2.2 and table I to regarding the 4 transistor
design. Added thermal resistance ratings for all case outlines to
paragraph 1.3. Editorial changes throughout. -sld
Update drawing to latest requirements of MIL-PRF-38534. -gc
DATE (YR-MO-DA)
96-04-19
00-07-10
APPROVED
K. A. Cottongim
Raymond Monnin
C
17-10-17
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
C
15
C
16
C
17
C
18
REV
SHEET
PREPARED BY
Steve L. Duncan
CHECKED BY
Michael C. Jones
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
8
C
9
C
10
C
11
C
12
C
13
C
14
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil/
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, HYBRID, MEMORY,
DIGITAL, STATIC RANDOM ACCESS
MEMORY, CMOS, 128K x 8-BIT
DRAWING APPROVAL DATE
93-04-01
REVISION LEVEL
C
SIZE
A
SHEET
CAGE CODE
67268
1 OF
18
5962-93156
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.
5962-E035-18
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