FPGA - Field Programmable Gate Array SX
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Microsemi |
| package instruction | CERAMIC, QFP-256 |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| Other features | 48000 SYSTEM GATES AVAILABLE |
| maximum clock frequency | 205 MHz |
| Combined latency of CLB-Max | 1 ns |
| JESD-30 code | S-CQFP-F256 |
| JESD-609 code | e0 |
| length | 36 mm |
| Configurable number of logic blocks | 2880 |
| Equivalent number of gates | 32000 |
| Number of entries | 246 |
| Number of logical units | 2880 |
| Output times | 246 |
| Number of terminals | 256 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| organize | 2880 CLBS, 32000 GATES |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | QFF |
| Encapsulate equivalent code | TPAK256,3SQ,20 |
| Package shape | SQUARE |
| Package form | FLATPACK |
| Peak Reflow Temperature (Celsius) | 225 |
| power supply | 3.3,5 V |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
| Certification status | Not Qualified |
| Filter level | MIL-STD-883 Class B |
| Maximum seat height | 3.06 mm |
| Maximum supply voltage | 3.63 V |
| Minimum supply voltage | 2.97 V |
| Nominal supply voltage | 3.3 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | FLAT |
| Terminal pitch | 0.5 mm |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | 20 |
| width | 36 mm |
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