Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Peak Repetitive Forward or Reverse Blocking Current (Note 3)
(V
D
= Rated V
DRM
and V
RRM
; R
GK
= 1 kW)
ON CHARACTERISTICS
Peak Forward On−State Voltage (Note 2)
(I
TM
= 16 A)
Gate Trigger Current (Continuous dc) (Note 4)
(V
D
= 12 V; R
L
= 100
W)
Holding Current (Note 3)
(V
D
= 12 V, Gate Open, Initiating Current = 200 mA)
Latch Current (Note 4)
(V
D
= 12 V, I
G
= 200
mA)
Gate Trigger Voltage (Continuous dc) (Note 4)
(V
D
= 12 V; R
L
= 100
W)
Gate Non−Trigger Voltage
(V
D
= 12 V, R
L
= 100
W)
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Off−State Voltage
(V
D
= 67% V
DRM
, R
GK
= 1 KW, C
GK
= 0.1
mF,
T
J
= 110°C)
Critical Rate of Rise of On−State Current
IPK = 50 A, Pw = 40
msec,
diG/dt = 1 A/msec, Igt = 10 mA
2. Indicates Pulse Test: Pulse Width
v
2.0 ms, Duty Cycle
v
2%.
3. R
GK
= 1000 Ohms included in measurement.
4. Does not include R
GK
in measurement.
dv/dt
di/dt
5.0
−
15
−
−
100
V/ms
A/ms
T
J
= 25°C
T
J
=
*40°C
T
J
= 110°C
V
TM
I
GT
I
H
I
L
V
GT
V
GD
−
5.0
−
−
0.3
−
0.2
−
25
0.5
0.6
0.65
−
−
1.8
200
6.0
8.0
1.0
1.5
−
V
mA
mA
mA
V
V
T
J
= 25°C
T
J
= 110°C
I
DRM
,
I
RRM
−
−
−
−
10
500
mA
Symbol
Min
Typ
Max
Unit
http://onsemi.com
2
MCR8SD, MCR8SM, MCR8SN
Voltage Current Characteristic of SCR
+ Current
Anode +
V
TM
on state
I
RRM
at V
RRM
I
H
Symbol
V
DRM
I
DRM
V
RRM
I
RRM
V
TM
I
H
Parameter
Peak Repetitive Off State Forward Voltage
Peak Forward Blocking Current
Peak Repetitive Off State Reverse Voltage
Peak Reverse Blocking Current
Peak On State Voltage
Holding Current
Reverse Blocking Region
(off state)
Reverse Avalanche Region
Anode
−
+ Voltage
I
DRM
at V
DRM
Forward Blocking Region
(off state)
P(AV), AVERAGE POWER DISSIPATION (WATTS)
110
TC , CASE TEMPERATURE (
°
C)
105
100
95
90
85
80
75
0
1
dc
30°
2
60°
3
90° 120° 180°
4
5
6
7
8
15
12
9
90°
6
30°
3
0
60°
120°
dc
180°
0
1
2
3
4
5
6
7
8
I
T(RMS)
, RMS ON−STATE CURRENT (AMPS)
I
T(AV)
, AVERAGE ON−STATE CURRENT (AMPS)
Figure 1. Typical RMS Current Derating
IT, INSTANTANEOUS ON−STATE CURRENT (AMPS)
Figure 2. On−State Power Dissipation
100
GATE TRIGGER CURRENT (
m
A)
3.5
TYPICAL @ T
J
= 25°C
MAXIMUM @ T
J
= 110°C
100
90
80
70
60
50
40
30
20
10
0
−40 −25 −10
5
20
35
50
65
80
95 110
10
MAXIMUM @ T
J
= 25°C
1
0.1
0.5
1.0
1.5
2.0
2.5
3.0
V
T
, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 3. Typical On−State Characteristics
Figure 4. Typical Gate Trigger Current versus
Junction Temperature
http://onsemi.com
3
MCR8SD, MCR8SM, MCR8SN
VGT, GATE TRIGGER VOLTAGE (VOLTS)
1000
IH, HOLDING CURRENT (
m
A)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
−40 −25 −10
5
20
35
50
65
80
95 110
100
10
1
−40 −25 −10
5
20
35
50
65
80
95
110
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 5. Typical Holding Current versus
Junction Temperature
Figure 6. Typical Gate Trigger Voltage versus
Junction Temperature
1000
IL, LATCHING CURRENT (
m
A)
100
10
1
−40 −25 −10
5
20
35
50
65
80
95
110
T
J
, JUNCTION TEMPERATURE (°C)
Figure 7. Typical Latching Current versus
Junction Temperature
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4
MCR8SD, MCR8SM, MCR8SN
PACKAGE DIMENSIONS
TO−220
CASE 221A−09
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.161
0.095
0.105
0.110
0.155
0.014
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
---
---
0.080
CATHODE
ANODE
GATE
ANODE
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
4.09
2.42
2.66
2.80
3.93
0.36
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
---
---
2.04
−T−
B
4
SEATING
PLANE
F
T
C
S
Q
1 2 3
A
U
K
H
Z
L
V
G
D
N
R
J
STYLE 3:
PIN 1.
2.
3.
4.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
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Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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