EEWORLDEEWORLDEEWORLD

Part Number

Search

W3EG6433S-AD4

Description
256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL
File Size323KB,13 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Compare View All

W3EG6433S-AD4 Overview

256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL

W3EG6433S-AD4 Preview

White Electronic Designs
W3EG6433S-AD4
-BD4
PRELIMINARY*
256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL
FEATURES
DDR200, DDR266 and DDR333
Double-data-rate architecture
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power supply: 2.5V ± 0.20V
JEDEC standard 200 pin SO-DIMM package
• Package height options:
AD4: 35.5mm (1.38")
BD4: 31.75mm (1.25")
NOTE: Consult factory for availability of:
• Lead-Free or RoHS Products
• Vendor source control options
• Industrial temperature option
* This product is under development, is not qualified or characterized and is subject to
change without notice.
DESCRIPTION
The W3EG6433S is a 32Mx64 Double Data Rate
SDRAM memory module based on 256Mb DDR
SDRAM component. The module consists of eight
32Mx8 DDR SDRAMs in 66 pin TSOP package
mounted on a 200 Pin FR4 substrate.
Synchronous design allows precise cycle control with
the use of system clock. Data I/O transactions are
possible on both edges and Burst Lenths allow the
same device to be useful for a variety of high bandwidth,
high performance memory system applications.
OPERATING FREQUENCIES
DDR333 @CL=2.5
Clock Speed
CL-t
RCD
-t
RP
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2005
Rev. 1
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
PIN CONFIGURATIONS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Symbol
V
REF
V
REF
V
SS
V
SS
DQ0
DQ4
DQ1
DQ5
V
CC
V
CC
DQS0
DQM0
DQ2
DQ6
V
SS
V
SS
DQ3
DQ7
DQ8
DQ12
V
CC
V
CC
DQ9
DQ13
DQS1
DQM1
V
SS
V
SS
DQ10
DQ14
DQ11
DQ15
V
CC
V
CC
CK0
V
CC
CK0#
V
SS
V
SS
V
SS
DQ16
DQ20
DQ17
DQ21
V
CC
V
CC
DQS2
DQM2
DQ18
DQ22
Pin
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Symbol
V
SS
V
SS
DQ19
DQ23
DQ24
DQ28
V
CC
V
CC
DQ25
DQ29
DQS3
DQM3
V
SS
V
SS
DQ26
DQ30
DQ27
DQ31
V
CC
V
CC
NC
NC
NC
NC
V
SS
V
SS
DQS8
DQM8
NC
NC
V
CC
V
CC
NC
NC
NC
NC
V
SS
V
SS
NC
V
SS
NC
V
CC
V
CC
V
CC
NC
CKE0
NC
NC
A12
A11
Pin
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
Symbol
A9
A8
V
SS
V
SS
A7
A6
A5
A4
A3
A2
A1
A0
V
CC
V
CC
A10/AP
BA1
BA0
RAS#
WE#
CAS#
CS0#
NC
NC
NC
V
SS
V
SS
DQ32
DQ36
DQ33
DQ37
V
CC
V
CC
DQS4
DQM4
DQ34
DQ38
V
SS
V
SS
DQ35
DQ39
DQ40
DQ44
V
CC
V
CC
DQ41
DQ45
DQS5
DQM5
V
SS
V
SS
Pin
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
Symbol
DQ42
DQ46
DQ43
DQ47
V
CC
V
CC
V
CC
NC
V
SS
NC
V
SS
V
SS
DQ48
DQ52
DQ49
DQ53
V
CC
V
CC
DQS6
DQM6
DQ50
DQ54
V
SS
V
SS
DQ51
DQ55
DQ56
DQ60
V
CC
V
CC
DQ57
DQ61
DQS7
DQM7
V
SS
V
SS
DQ58
DQ62
DQ59
DQ63
V
CC
V
CC
SDA
SA0
SCL
SA1
V
CCSPD
SA2
V
CCID
NC
W3EG6433S-AD4
-BD4
PRELIMINARY
PIN NAMES
A0 – A12
BA0-BA1
DQ0-DQ63
DQS0-DQS8
CK0
CK0#
CKE0
CS0#
RAS#
CAS#
WE#
DQM0-DQM8
V
CC
V
CCQ
V
SS
V
REF
V
CCSPD
SDA
SCL
SA0-SA2
V
CCID
NC
Address input (Multiplexed)
Bank Select Address
Data Input/Output
Data Strobe Input/Output
Clock input
Clock input
Clock Enable Input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
Data-In Mask
Power Supply
Power Supply for DQS
Ground
Power Supply for Reference
Serial EEPROM Power Supply
Serial data I/O
Serial clock
Address in EEPROM
V
CC
Identification Flag
No Connect
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2005
Rev. 1
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FUNCTIONAL BLOCK DIAGRAM
W3EG6433S-AD4
-BD4
PRELIMINARY
S0#
DQS0
DM0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS2
DM2
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQS4
DM4
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQS6
DM6
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS7
DM7
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
SA0 SA1 SA2
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS5
DM5
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS3
DM3
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS1
DM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DM CS# DQS
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
CK0
120Ω
CK0#
PLL
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
BA0, BA1
A0-A12
RAS#
WE#
CKE0
CAS#
BA0, BA1: DDR SDRAMs
A0-A12: DDR SDRAMs
RAS#: DDR SDRAMs
WE#: DDR SDRAMs
CKE0: DDR SDRAMs
CAS#: DDR SDRAMs
SERIAL PD
SCL
WP
SDA
A0
A1
A2
V
CCSPD
V
CC
V
REF
V
SS
SPD/EEPROM
DDR SDRAMS
DDR SDRAMS
DDR SDRAMS
NOTE: All resistor values are 22 ohms unless otherwise specified.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2005
Rev. 1
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Current
Note:
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
W3EG6433S-AD4
-BD4
PRELIMINARY
Symbol
V
IN
, V
OUT
V
CC
, V
CCQ
T
STG
P
D
I
OS
Value
-0.5 to 3.6
-1.0 to 3.6
-55 to +150
8
50
Units
V
V
°C
W
mA
DC CHARACTERISTICS
0°C
T
A
70°C, V
CC
= 2.5V ± 0.2V
Symbol
V
CC
V
CCQ
V
REF
V
TT
V
IH
V
IL
V
OH
V
OL
Parameter
Supply Voltage
Supply Voltage
Reference Voltage
Termination Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Min
2.3
2.3
V
CCQ/2
- 50mV
V
REF
- 0.04
V
REF
+ 0.15
-0.3
V
TT
+ 0.76
Max
2.7
2.7
V
CCQ/2
+ 50mV
V
REF
+ 0.04
V
CCQ
+ 0.3
V
REF
- 0.15
V
TT
- 0.76
Unit
V
V
V
V
V
V
V
V
CAPACITANCE
T
A
= 25°C, f = 1MHz, V
CC
= 3.3V, V
REF
=1.4V
±
200mV
Parameter
Input Capacitance (A0-A12)
Input Capacitance (RAS#, CAS#, WE#)
Input Capacitance (CKE0)
Input Capacitance (CK0,CK0#)
Input Capacitance (CS0#)
Input Capacitance (DQM0-DQM8)
Input Capacitance (BA0-BA1)
Data input/output capacitance (DQ0-DQ63)(DQS)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
IN7
C
OUT
Max
29
29
29
5.5
29
8
29
8
Unit
pF
pF
pF
pF
pF
pF
pF
pF
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2005
Rev. 1
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
I
DD
SPECIFICATIONS AND TEST CONDITIONS
W3EG6433S-AD4
-BD4
PRELIMINARY
Recommended operating conditions, 0°C ≤ T
A
≤ 70°C, V
CCQ
= 2.5V ±0.2V, V
CC
= 2.5V ±0.2V
DDR333@CL=2.5 DDR266@CL=2, 2.5
Parameter
Symbol Conditions
One device bank; Active - Precharge;
t
RC
=t
RC
(MIN); t
CK
=t
CK
(MIN); DQ,DM and DQS
inputs changing once per clock cycle; Address
and control inputs changing once every two
cycles.
One device bank; Active-Read-Precharge;
Burst = 2; t
RC
=t
RC
(MIN);t
CK
=t
CK
(MIN); Iout =
0mA; Address and control inputs changing
once per clock cycle.
All device banks idle; Power- down mode;
t
CK
=t
CK
(MIN); CKE=(low)
CS# = High; All device banks idle;
t
CK
=t
CK
(MIN); CKE = high; Address and other
control inputs changing once per clock cycle.
Vin = Vref for DQ, DQS and DM.
One device bank active; Power-down mode;
t
CK
(MIN); CKE=(low)
CS# = High; CKE = High; One device
bank; Active-Precharge; t
RC
=t
RAS
(MAX);
t
CK
=t
CK
(MIN); DQ, DM and DQS inputs
changing twice per clock cycle; Address and
other control inputs changing once per clock
cycle.
Burst = 2; Reads; Continous burst; One
device bank active;Address and control inputs
changing once per clock cycle; t
CK
=t
CK
(MIN);
Iout = 0mA.
Burst = 2; Writes; Continous burst; One
device bank active; Address and control inputs
changing once per clock cycle; t
CK
=t
CK
(MIN);
DQ,DM and DQS inputs changing twice per
clock cycle.
t
RC
=t
RC
(MIN)
CKE
0.2V
Four bank interleaving Reads (BL=4) with auto
precharge with t
RC
=t
RC
(MIN); t
CK
=t
CK
(MIN);
Address and control inputs change only
during Active Read or Write commands.
Max
1275
Max
1276
DDR200@CL=2
Max
1235
Units
mA
Operating Current
I
DD0
1635
1555
1435
mA
Operating Current
I
DD1
Precharge Power-Down
Standby Current
I
DD2P
32
675
32
635
32
635
mA
mA
Idle Standby Current
I
DD2F
Active Power-Down
Standby Current
I
DD3P
240
755
200
675
240
675
mA
mA
Active Standby Current
I
DD3N
1675
1475
1475
mA
Operating Current
I
DD4R
1675
1475
1475
mA
Operating Current
I
DD4W
Auto Refresh Current
Self Refresh Current
I
DD5
I
DD6
2315
307
3555
2155
307
3075
2235
307
3195
mA
mA
mA
Operating Current
I
DD7A
* For DDR333 consult factory
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2005
Rev. 1
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

W3EG6433S-AD4 Related Products

W3EG6433S-AD4 W3EG6433S265BD4 W3EG6433S262BD4 W3EG6433S335AD4 W3EG6433S265AD4 W3EG6433S262AD4 W3EG6433S202BD4 W3EG6433S202AD4 W3EG6433S-BD4
Description 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL 256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL
Is it Rohs certified? - incompatible incompatible incompatible incompatible incompatible incompatible incompatible -
Maker - White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation White Electronic Designs Corporation -
package instruction - DIMM, DIMM, DIMM, DIMM, DIMM, DIMM, DIMM, -
Reach Compliance Code - unknow unknow unknow unknow unknow unknown unknow -
access mode - FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST -
Maximum access time - 0.75 ns 0.75 ns 0.7 ns 0.75 ns 0.75 ns 0.75 ns 0.75 ns -
Other features - AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH -
JESD-30 code - R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 -
memory density - 2147483648 bi 2147483648 bi 2147483648 bi 2147483648 bi 2147483648 bi 2147483648 bit 2147483648 bi -
Memory IC Type - DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE -
memory width - 64 64 64 64 64 64 64 -
Number of functions - 1 1 1 1 1 1 1 -
Number of ports - 1 1 1 1 1 1 1 -
Number of terminals - 200 200 200 200 200 200 200 -
word count - 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words -
character code - 32000000 32000000 32000000 32000000 32000000 32000000 32000000 -
Operating mode - SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS -
Maximum operating temperature - 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C -
organize - 32MX64 32MX64 32MX64 32MX64 32MX64 32MX64 32MX64 -
Package body material - UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED -
encapsulated code - DIMM DIMM DIMM DIMM DIMM DIMM DIMM -
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR -
Package form - MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY -
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
Certification status - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified -
self refresh - YES YES YES YES YES YES YES -
Maximum supply voltage (Vsup) - 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V -
Minimum supply voltage (Vsup) - 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V -
Nominal supply voltage (Vsup) - 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V -
surface mount - NO NO NO NO NO NO NO -
technology - CMOS CMOS CMOS CMOS CMOS CMOS CMOS -
Temperature level - COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL -
Terminal form - NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD -
Terminal location - DUAL DUAL DUAL DUAL DUAL DUAL DUAL -
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号