Digital Signal Processors 68-JLCC -55 to 125
| Parameter Name | Attribute value |
| Brand Name | Texas Instruments |
| Is it Rohs certified? | incompatible |
| Maker | Texas Instruments |
| Parts packaging code | LCC |
| package instruction | QCCJ, LDCC68,1.0SQ |
| Contacts | 68 |
| Reach Compliance Code | not_compliant |
| ECCN code | 3A001.A.2.C |
| Other features | PID CONTROL; 256 WORDS DATA/PROG RAM |
| Address bus width | 16 |
| barrel shifter | YES |
| bit size | 16 |
| boundary scan | NO |
| maximum clock frequency | 40 MHz |
| External data bus width | 16 |
| Format | FIXED POINT |
| Integrated cache | NO |
| Internal bus architecture | MULTIPLE |
| JESD-30 code | S-CQCC-J68 |
| length | 24.2 mm |
| low power mode | NO |
| Number of DMA channels | |
| Number of external interrupt devices | 3 |
| Number of serial I/Os | 1 |
| Number of terminals | 68 |
| Number of timers | 1 |
| On-chip data RAM width | 16 |
| On-chip program ROM width | 16 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | QCCJ |
| Encapsulate equivalent code | LDCC68,1.0SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Certification status | Not Qualified |
| RAM (number of words) | 544 |
| rom(word) | 64000 |
| ROM programmability | MROM |
| Filter level | MIL-PRF-38535 |
| Maximum seat height | 3.68 mm |
| Maximum slew rate | 185 mA |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 24.2 mm |
| uPs/uCs/peripheral integrated circuit type | DIGITAL SIGNAL PROCESSOR, OTHER |
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