IS62C256
32K x 8 LOW POWER CMOS STATIC RAM
FEATURES
• Access time: 45, 70 ns
• Low active power: 200 mW (typical)
• Low standby power
— 250
µW
(typical) CMOS standby
— 28 mW (typical) TTL standby
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 5V power supply
ISSI
®
DESCRIPTION
The
ISSI
IS62C256 is a low power, 32,768 word by 8-bit
CMOS static RAM. It is fabricated using
ISSI
's high-
performance, low power CMOS technology.
When
CS
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down to
250
µW
(typical) at CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Select (
CS
) input and an active LOW Output Enable (
OE
)
input. The active LOW Write Enable (
WE
) controls both writing
and reading of the memory.
The IS62C256 is pin compatible with other 32K x 8 SRAMs in
plastic SOP or TSOP (Type I) package.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
32K X 8
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CS
OE
WE
CONTROL
CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR072-1E
05/12/99
1
IS62C256
PIN CONFIGURATION
28-Pin SOP
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
ISSI
PIN CONFIGURATION
28-Pin TSOP
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
®
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
PIN DESCRIPTIONS
A0-A14
Address Inputs
Chip Select Input
Output Enable Input
Write Enable Input
Input/Output
Power
Ground
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
CS
OE
WE
I/O0-I/O7
Vcc
GND
WE
X
H
H
L
CS
H
L
L
L
OE
X
H
L
X
I/O Operation
High-Z
High-Z
D
OUT
D
IN
Vcc Current
I
SB
1
, I
SB
2
I
CC
1
, I
CC
2
I
CC
1
, I
CC
2
I
CC
1
, I
CC
2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
BIAS
T
STG
P
T
I
OUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current (LOW)
Value
–0.5 to +7.0
–55 to +125
–65 to +150
Unit
V
°C
°C
W
mA
0.5
20
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR072-1E
05/12/99
IS62C256
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
5V
±
10%
5V
±
10%
ISSI
®
DC ELECTRICAL CHARACTERISTICS
Symbol
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
CC
= Min., I
OH
= –1.0 mA
V
CC
= Min., I
OL
= 2.1 mA
Min.
2.4
—
2.2
–0.3
Com.
Ind.
Com.
Ind.
–2
–10
–2
–10
Max.
—
0.4
V
CC
+ 0.5
0.8
2
10
2
10
Unit
V
V
V
V
µA
µA
GND
≤
V
IN
≤
V
CC
GND
≤
V
OUT
≤
V
CC
,
Outputs Disabled
Note:
1. V
IL
= –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
1
I
CC
2
I
SB
1
Parameter
Vcc Operating
Supply Current
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
CC
= Max.,
CS
= V
IL
I
OUT
= 0 mA, f = 0
V
CC
= Max.,
CS
= V
IL
I
OUT
= 0 mA, f = f
MAX
V
CC
= Max.,
V
IN
= V
IH
or V
IL
CS
≥
V
IH
, f = 0
V
CC
= Max.,
CS
≥
V
CC
– 0.2V,
V
IN
≥
V
CC
– 0.2V, or
V
IN
≤
0.2V, f = 0
-45 ns
Min. Max.
— 60
— 70
— 70
— 80
—
5
— 10
—
—
0.5
1.0
-70 ns
Min. Max.
—
60
—
70
—
65
—
75
—
5
—
10
—
—
0.5
1.0
Unit
mA
mA
mA
Com.
Ind.
Com.
Ind.
Com.
Ind.
Com.
Ind.
I
SB
2
mA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE
(1,2)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
8
10
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, Vcc = 5.0V.
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR072-1E
05/12/99
3
IS62C256
DATA RETENTION CHARACTERISTICS
Symbol
V
DR
I
DR
1
I
DR
2
Parameter
V
CC
for retention of data
Data retention current
Data retention current
Test Conditions
V
DR
= 3.0V, T
A
= 0°C to +25°C
V
DR
= 3.0V, T
A
= 0°C to +70°C
Min.
2.0
—
—
Max.
—
200
200
ISSI
Units
V
µA
µA
®
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
-45 ns
Min. Max.
45
—
2
—
—
0
0
3
0
0
—
—
45
—
45
25
—
20
—
20
—
30
-70 ns
Min.
Max.
70
—
2
—
—
0
0
3
0
0
—
—
70
—
70
35
—
25
—
25
—
50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACS
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCS
(2)
t
HZCS
(2)
t
PU
(3)
t
PD
(3)
CS
Access Time
OE
Access Time
OE
to Low-Z Output
OE
to High-Z Output
CS
to Low-Z Output
CS
to High-Z Output
CS
to Power-Up
CS
to Power-Down
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured
±500
mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
480
Ω
5V
5V
480
Ω
OUTPUT
100 pF
Including
jig and
scope
255
Ω
OUTPUT
5 pF
Including
jig and
scope
255
Ω
Figure 1.
4
Figure 2.
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR072-1E
05/12/99
IS62C256
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
t
RC
ADDRESS
ISSI
®
t
AA
t
OHA
D
OUT
PREVIOUS DATA VALID
t
OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2
(1,3)
t
RC
ADDRESS
t
AA
OE
t
OHA
t
DOE
CS
t
HZOE
t
LZOE
t
ACS
t
LZCS
t
HZCS
DATA VALID
CS_RD2.eps
D
OUT
HIGH-Z
Notes:
1.
WE
is HIGH for a Read Cycle.
2. The device is continuously selected.
OE
,
CS
= V
IL
.
3. Address is valid prior to or coincident with
CS
LOW transitions.
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR072-1E
05/12/99
5