FDS4935
June 2001
FDS4935
Dual 30V P-Channel PowerTrench
®
MOSFET
General Description
This P
-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
Features
•
–7 A, –30 V
R
DS(ON)
= 23 mΩ @ V
GS
= –10 V
R
DS(ON)
= 35 mΩ @ V
GS
= –4.5 V
•
Low gate charge (15nC typical)
•
Fast swi ching speed
t
•
High performance trench technology for extremely
low R
DS(ON)
•
High power and current handling capability
Applications
•
Power management
•
Load switch
•
Battery protection
D2
D
D1
D
D2
D
D
D1
5
6
7
G1
S1
G
G2
S
S2
S
Q1
4
3
2
Q2
SO-8
Pin 1
SO-8
8
1
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25
o
C unless otherwise noted
Parameter
Ratings
–30
±25
(Note 1a)
Units
V
V
A
–7
–30
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
–55 to +175
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJ
C
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS4935
©2001
Fairchild Semiconductor International
Device
FDS4935
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
FDS4935 Rev B1(W)
FDS4935
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
T
A
= 25°C unless otherwise noted
Paramete r
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
DS
= –24 V,
V
GS
= –25 V,
V
GS
= 25 V,
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
Min
–30
Typ
Max Units
V
Off Characteristics
–24
–1
–100
100
–1
–1.6
4.4
19
28
26
–30
19
23
35
34
–3
mV/°C
µA
nA
nA
V
mV/°C
mΩ
On Characteristics
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
V
DS
= V
GS
, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
GS
= –10 V,
I
D
= –7 A
V
GS
= –4.5 V, I
D
= –5.5 A
V
GS
= –10 V, I
D
= –7 A, T
J
=125°C
V
GS
= –10 V,
V
DS
= –5 V,
V
DS
= –5 V
I
D
= –7 A
I
D(on)
g
FS
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= –15 V,
f = 1.0 MHz
V
GS
= 0 V,
1233
311
152
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= –15 V,
V
GS
= –10 V,
I
D
= –1 A,
R
GEN
= 6
Ω
13
10
48
25
23
20
77
40
21
ns
ns
ns
ns
nC
nC
nC
V
DS
= –15 V,
V
GS
= –5 V
I
D
= –7 A,
15
4.4
4.5
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V
GS
= 0 V, I
S
= –2.1 A
Voltage
–2.1
(Note 2)
A
V
–0.75
–1.2
a) 78°C/W when
mounted on a 0.5in
2
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in
2
pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4935 Rev B1(W)
FDS4935
Typical Characteristics
50
V
GS
= -10V
-6.0V
-5.0V
R
DS(ON)
NORMALIZED
,
DRAIN-SOURCE ON-RESISTANCE
-4.5V
-4.0V
2.4
2.2
V
GS
= -3.5V
2
1.8
1.6
1.4
1.2
-10V
1
0.8
-4.0V
-4.5V
-5.0V
-6.0V
40
-I
D
, DRAIN CURRENT (A)
30
-3.5V
20
-3.0V
10
0
0
1
2
3
4
5
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0
10
20
30
40
50
-I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.08
R
DS(ON)
ON-RESISTANCE (OHM)
,
1.6
R
DS(ON)
NORMALIZED
,
DRAIN-SOURCE ON-RESISTANCE
I
D
= -7A
V
GS
= -10V
1.4
I
D
= -3.5A
0.06
1.2
0.04
1
T
A
= 125
o
C
0.8
0.02
T
A
= 25
o
C
0.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
0
2
4
6
8
10
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
50
-I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= -5.0V
40
-I
D
, DRAIN CURRENT (A)
125
o
C
30
T
A
= -55
o
C
25
o
C
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
V
GS
= 0V
10
T
A
= 125
o
C
25
o
C
0.1
-55
o
C
0.01
1
20
10
0.001
0
1
2
3
4
5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4935 Rev B1(W)
FDS4935
Typical Characteristics
10
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -8.8A
8
CAPACITANCE (pF)
-15V
6
V
DS
= -5V
-10V
2000
1800
1600
1400
1200
1000
800
600
400
200
C
OSS
C
RSS
0
5
10
15
20
25
30
C
ISS
f = 1 MHz
V
GS
= 0 V
4
2
0
0
4
8
12
16
20
24
Q
g
, GATE CHARGE (nC)
0
-V
D S
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
Figure 8. Capacitance Characteristics.
50
-I
D
, DRAIN CURRENT (A)
10
1ms
10ms
100ms
1s
P(pk), PEAK TRANSIENT POWER (W)
R
DS(ON)
LIMIT
100µs
40
SINGLE PULSE
R
θ
JA
= 135°C/W
T
A
= 25°C
30
1
DC
V
G S
= -10V
0.1
SINGLE PULSE
R
θ
JA
= 135 C/W
T
A
= 25
o
C
0.01
0.1
1
o
10s
20
10
10
100
0
0.001
0.01
0.1
1
10
100
-V
D S
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
D = 0.5
0.2
R
θ
JA
(t) = r(t) + R
θ
JA
R
θJA
= 135 °C/W
P(pk)
0.02
0.01
0.1
0.1
0.05
t
1
t
2
T
J
- T
A
= P * R
θ
JA
(t)
Duty Cycle, D = t
1
/ t
2
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS4935 Rev B1(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E
2
CMOS
TM
EnSigna
TM
FACT™
FACT Quiet Series™
DISCLAIMER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
VCX™
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or
In Design
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H3
京公网安备 11010802033920号
EEWORLD
