K6X4008C1F Family
Document Title
512Kx8 bit Low Power full CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0
0.1
History
Initial draft
Revised
- Added Commercial Product.
Finalized
- Added Lead Free 32-SOP-525 Product
- Changed I
CC
from 10mA to 5mA
- Changed I
CC
1 from 8mA to 7mA
- Changed I
CC
2 from 40mA to 30mA
- Changed I
SB
from 3mA to 0.4mA
- Changed I
DR
(Commercial)
from 15µA to 12µA
- Changed I
DR
(industrial)
from 20µA to 12µA
- Changed I
DR
(Automotive)
from 30µA to 25µA
Draft Date
July 30, 2002
November 30, 2002
Remark
Preliminary
Preliminary
1.0
September 16, 2003 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 1.0
September 2003
K6X4008C1F Family
512Kx8 bit Low Power full CMOS Static RAM
FEATURES
•
Process Technology: Full CMOS
•
Organization: 512Kx8
•
Power Supply Voltage: 4.5~5.5V
•
Low Data Retention Voltage: 2V(Min)
•
Three state output and TTL compatible
•
Package Type: 32-DIP-600, 32-SOP-525,
32-TSOP2-400F/R
CMOS SRAM
GENERAL DESCRIPTION
The K6X4008C1F families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families sup-
ports various operating temperature range and various
package types for user flexibility of system design. The fam-
ilies also support low data retention voltage for battery back-
up operation with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
Operating Temperature
Vcc Range
Speed
Standby Operating
(I
SB1
, Max) (I
CC2
, Max)
20µA
K6X4008C1F-F
K6X4008C1F-Q
Industrial (-40~85°C)
Automotive (-40~125°C)
4.5~5.5V
55
1)
/70ns
30µA
30mA
PKG Type
K6X4008C1F-B
Commercial (0~70°C)
32-DIP-600, 32-SOP-525,
32-TSOP2-400F/R
32-SOP-525, 32-TSOP2-400F
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
FUNCTIONAL BLOCK DIAGRAM
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O
1
I/O
8
Clk gen.
Precharge circuit.
32-DIP
32-SOP
32-TSOP2
(Forward)
26
25
24
23
22
21
20
19
18
17
32-TSOP2
(Reverse)
7
8
9
10
11
12
13
14
15
16
Row
Addresses
Row
select
Memory array
Data
cont
I/O Circuit
Column select
Data
cont
Pin Name
WE
CS
OE
A
0
~A
18
I/O
1
~I/O
8
Vcc
Vss
Function
Write Enable Input
Chip Select Input
Output Enable Input
Address Inputs
Data Inputs/Outputs
Power
Ground
CS
WE
OE
Column Addresses
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 1.0
September 2003
K6X4008C1F Family
PRODUCT LIST
Commercial Products(0~70°C)
Part Name
K6X4008C1F-DB55
K6X4008C1F-DB70
K6X4008C1F-GB55
K6X4008C1F-GB70
K6X4008C1F-BB55
1)
K6X4008C1F-BB70
1)
K6X4008C1F-VB55
K6X4008C1F-VB70
K6X4008C1F-MB55
K6X4008C1F-MB70
1. Lead Free Product
CMOS SRAM
Industrial Products(-40~85°C)
Part Name
K6X4008C1F-DF55
K6X4008C1F-DF70
K6X4008C1F-GF55
K6X4008C1F-GF70
K6X4008C1F-BF55
1)
K6X4008C1F-BF70
1)
K6X4008C1F-VF55
K6X4008C1F-VF70
K6X4008C1F-MF55
K6X4008C1F-MF70
Automotive Products(-40~125°C)
Part Name
K6X4008C1F-GQ55
K6X4008C1F-GQ70
K6X4008C1F-VQ55
K6X4008C1F-VQ70
Function
32-DIP, 55ns, LL
32-DIP, 70ns, LL
32-SOP, 55ns, LL
32-SOP, 70ns, LL
32-SOP, 55ns, LL
32-SOP, 70ns, LL
32-TSOP2-F, 55ns, LL
32-TSOP2-F, 70ns, LL
32-TSOP2-R, 55ns, LL
32-TSOP2-R, 70ns, LL
Function
32-DIP, 55ns, LL
32-DIP, 70ns, LL
32-SOP, 55ns, LL
32-SOP, 70ns, LL
32-SOP, 55ns, LL
32-SOP, 70ns, LL
32-TSOP2-F, 55ns, LL
32-TSOP2-F, 70ns, LL
32-TSOP2-R, 55ns, LL
32-TSOP2-R, 70ns, LL
Function
32-SOP, 55ns, L
32-SOP, 70ns, L
32-TSOP2-F, 55ns, L
32-TSOP2-F, 70ns, L
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
OE
X
1)
H
L
X
1)
WE
X
1)
H
H
L
I/O Pin
High-Z
High-Z
Dout
Din
Mode
Deselected
Output disbaled
Read
Write
Power
Standby
Active
Active
Active
1. X means don′t care.( Must be in low or high state.)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
Ratings
-0.5 to V
CC
+0.5V(max. 7.0V)
-0.3 to 7.0
1.0
-65 to 150
0 to 70
-40 to 85
-40 to 125
°C
Unit
V
V
W
°C
Remark
-
-
-
-
K6X4008C1F-B
K6X4008C1F-F
K6X4008C1F-Q
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 1.0
September 2003
K6X4008C1F Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Min
4.5
0
2.2
-0.5
3)
Typ
5.0
0
-
-
CMOS SRAM
Max
5.5
0
Vcc+0.5
2)
0.8
Unit
V
V
V
V
Note:
1.Commercial Product: T
A
=0 to 70°C, otherwise specified
Industrial Product: T
A
=-40 to 85°C, otherwise specified
Automotive Product: T
A
=-40 to 125°C, otherwise specified
2. Overshoot: V
CC
+3.0V in case of pulse width
≤
30ns
3. Undershoot: -3.0V in case of pulse width
≤
30ns
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Average operating current
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current(CMOS)
V
OL
V
OH
I
SB
I
SB1
V
IN
=Vss to Vcc
CS=V
IH
or OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH
, Read
Cycle time=1µs, 100% duty, I
IO
=0mA
CS≤0.2V, V
IN
≥0.2V
or V
IN
≥Vcc-0.2V
Cycle time=Min, 100% duty, I
IO
=0mA, CS=V
IL,
V
IN
=V
IH
or V
IL
Test Conditions
Min
-1
-1
-
-
-
-
2.4
-
K6X4008C1F-B
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
Max
1
1
5
7
30
0.4
-
0.4
20
30
Unit
µA
µA
mA
mA
mA
V
V
mA
µA
µA
I
OL
=2.1mA
I
OH
=-1.0mA
CS=V
IH
, Other inputs = V
IL
or V
IH
CS≥Vcc-0.2V, Other inputs=0~Vcc
K6X4008C1F-F
K6X4008C1F-Q
4
Revision 1.0
September 2003
K6X4008C1F Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level: 0.8 to 2.4V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See right): C
L
=100pF+1TTL
C
L
=50pF+1TTL
C
L
1)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS
(Vcc=4.5~5.5V, Commercial product: T
A
=0 to 70°C, Industrial product: T
A
=-40 to 85°C, Automotive product: T
A
=-40 to 125°C)
Speed Bins
Parameter List
Symbol
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Read
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
55
-
-
-
10
5
0
0
10
55
45
0
45
40
0
0
25
0
5
55ns
Max
-
55
55
25
-
-
20
20
-
-
-
-
-
-
-
20
-
-
-
Min
70
-
-
-
10
5
0
0
10
70
60
0
60
50
0
0
30
0
5
70ns
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Symbol
V
DR
I
DR
Test Condition
CS≥Vcc-0.2V
K6X4008C1F-B
Vcc=3.0V, CS≥Vcc-0.2V
K6X4008C1F-F
K6X4008C1F-Q
Min
2.0
-
Typ
-
-
Max
5.5
12
12
25
Unit
V
µA
Data retention set-up time
Recovery time
t
SDR
t
RDR
See data retention waveform
0
5
-
-
-
-
ms
5
Revision 1.0
September 2003
Real-time operating system RTOS
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