SN7450JP4 datasheet, PDF - EEWORLD Datasheet

SN7450JP4: DescriptionIC,LOGIC GATE,2 2/2-IN AND-NOR,STD-TTL,DIP,14PIN,CERAMIC; Categorylogic logic; File Size126KB，3 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN7450JP4 Overview

IC,LOGIC GATE,2 2/2-IN AND-NOR,STD-TTL,DIP,14PIN,CERAMIC

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	1435477203
package instruction	DIP, DIP14,.3
Reach Compliance Code	not_compliant
JESD-30 code	R-XDIP-T14
Logic integrated circuit type	AND-OR-INVERT GATE
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Schmitt trigger	NO
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED


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