HYB18T512160AC-5 datasheet, PDF

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HYB18T512160AC-5: Description512-Mbit Double-Data-Rate-Two SDRAM; Categorystorage storage; File Size2MB，96 Pages; ManufacturerInfineon; Websitehttp://www.infineon.com/

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HYB18T512160AC-5 Overview

512-Mbit Double-Data-Rate-Two SDRAM

HYB18T512160AC-5 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Infineon
Parts packaging code	BGA
package instruction	PLASTIC, TFBGA-84
Contacts	84
Reach Compliance Code	not_compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.6 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
interleaved burst length	4,8
JESD-30 code	R-PBGA-B84
JESD-609 code	e0
length	12.5 mm
memory density	536870912 bit
Memory IC Type	DDR DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	84
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	95 °C
Minimum operating temperature
organize	32MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA84,9X15,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	4,8
Maximum standby current	0.004 A
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm

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D a t a S h e e t , Rev. 1.13, M a i 2 00 4

HYB18T512[400/800/160]AC–[3.7/5]

HYB18T512[400/800/160]AF–[3.7/5]

512-Mbit Double-Data-Rate-Two SDRAM

DDR2 SDRAM

M e m or y P r o du c t s

N e v e r

s t o p

t h i n k i n g .

HYB18T512[400/800/160]A[C/F]–[3.7/5]

512-Mbit Double-Data-Rate-Two SDRAM

Table of Contents

1.1

1.2

1.3

1.4

1.5

1.6

1.7

2.1

2.2

2.2.1

2.2.2

2.2.2.1

2.2.3

2.2.4

2.2.5

2.3

2.4

2.5

2.6

2.6.1

2.6.2

2.6.3

2.6.4

2.6.5

2.6.6

2.7

2.7.1

2.7.2

2.8

2.8.1

2.8.2

2.8.3

2.8.4

2.9

2.9.1

2.9.2

2.10

2.11

2.11.1

2.11.2

2.12

2.13

5.1

5.2

5.3

5.4

5.4.1

5.5

5.6

Page

Overview

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

512Mbit DDR2 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Input/Output Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Functional Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Simplified State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Basic Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power On and Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Programming the Mode Register and Extended Mode Registers . . . . . . . . . . . . . . . . . . . . . . . . . .

DDR2 SDRAM Mode Register Set (MRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DDR2 SDRAM Extended Mode Register Set (EMRS(1)) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EMRS(2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EMRS(3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Off-Chip Driver (OCD) Impedance Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

On-Die Termination (ODT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Bank Activate Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Read and Write Commands and Access Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Posted CAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Burst Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Read Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Write Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Write Data Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Burst Interruption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Precharge Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Read Operation Followed by a Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Write followed by Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Auto-Precharge Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Read with Auto-Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Write with Auto-Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Read or Write to Precharge Command Spacing Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Concurrent Auto-Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Auto-Refresh Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Self-Refresh Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Other Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

No Operation Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Deselect Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input Clock Frequency Change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Asynchronous CKE Low Reset Event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Truth Tables

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Operating Conditions

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

AC & DC Operating Conditions

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC & AC Logic Input Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Default Output V-I Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Calibrated Output Driver V-I Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input / Output Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power & Ground Clamp V-I Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Data Sheet

Rev. 1.13, 2004-05

09112003-SDM9-IQ3P

HYB18T512160AC-5 Related Products

	HYB18T512160AC-5	HYB18T512160AC-37	HYB18T512160AF-37	HYB18T512400AC-5	HYB18T512400AC5	HYB18T512400AC-37	HYB18T512400AF-37	HYB18T512800AC-37	HYB18T512800AC-5	HYB18T512800AF-37
Description	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM	512-Mbit Double-Data-Rate-Two SDRAM

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