Field Programmable Gate Array, 295 CLBs, 3000 Gates, 48.24MHz, 295-Cell, CMOS, PQCC68, PLASTIC, LCC-68
Parameter Name | Attribute value |
Is it Rohs certified? | conform to |
Maker | Microsemi |
package instruction | QCCJ, LDCC68,1.0SQ |
Reach Compliance Code | compliant |
Other features | CAN ALSO BE OPERATED AT 5.0V |
maximum clock frequency | 48.24 MHz |
Combined latency of CLB-Max | 3.7 ns |
JESD-30 code | S-PQCC-J68 |
JESD-609 code | e3 |
length | 24.2316 mm |
Humidity sensitivity level | 3 |
Configurable number of logic blocks | 295 |
Equivalent number of gates | 3000 |
Number of entries | 57 |
Number of logical units | 295 |
Output times | 57 |
Number of terminals | 68 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | -40 °C |
organize | 295 CLBS, 3000 GATES |
Package body material | PLASTIC/EPOXY |
encapsulated code | QCCJ |
Encapsulate equivalent code | LDCC68,1.0SQ |
Package shape | SQUARE |
Package form | CHIP CARRIER |
Peak Reflow Temperature (Celsius) | 245 |
power supply | 3.3/5 V |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum seat height | 4.57 mm |
Maximum supply voltage | 3.6 V |
Minimum supply voltage | 3 V |
Nominal supply voltage | 3.3 V |
surface mount | YES |
technology | CMOS |
Temperature level | INDUSTRIAL |
Terminal surface | Matte Tin (Sn) |
Terminal form | J BEND |
Terminal pitch | 1.27 mm |
Terminal location | QUAD |
Maximum time at peak reflow temperature | 40 |
width | 24.2316 mm |
Base Number Matches | 1 |