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A40MX02-FPLG68I

Description
Field Programmable Gate Array, 295 CLBs, 3000 Gates, 48.24MHz, 295-Cell, CMOS, PQCC68, PLASTIC, LCC-68
CategoryProgrammable logic devices    Programmable logic   
File Size880KB,123 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Environmental Compliance
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A40MX02-FPLG68I Overview

Field Programmable Gate Array, 295 CLBs, 3000 Gates, 48.24MHz, 295-Cell, CMOS, PQCC68, PLASTIC, LCC-68

A40MX02-FPLG68I Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMicrosemi
package instructionQCCJ, LDCC68,1.0SQ
Reach Compliance Codecompliant
Other featuresCAN ALSO BE OPERATED AT 5.0V
maximum clock frequency48.24 MHz
Combined latency of CLB-Max3.7 ns
JESD-30 codeS-PQCC-J68
JESD-609 codee3
length24.2316 mm
Humidity sensitivity level3
Configurable number of logic blocks295
Equivalent number of gates3000
Number of entries57
Number of logical units295
Output times57
Number of terminals68
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize295 CLBS, 3000 GATES
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC68,1.0SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)245
power supply3.3/5 V
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height4.57 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
width24.2316 mm
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