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DG507ACK

Description
Differential Multiplexer, 1 Func, 8 Channel, CMOS, CDIP28
CategoryAnalog mixed-signal IC    The signal circuit   
File Size320KB,13 Pages
ManufacturerHarris
Websitehttp://www.harris.com/
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DG507ACK Overview

Differential Multiplexer, 1 Func, 8 Channel, CMOS, CDIP28

DG507ACK Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerHarris
package instructionDIP, DIP28,.6
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesDIFFERENTIAL MULTIPLEXER
JESD-30 codeR-GDIP-T28
JESD-609 codee0
Nominal Negative Supply Voltage (Vsup)-15 V
Number of channels8
Number of functions1
Number of terminals28
Nominal off-state isolation68 dB
On-state resistance matching specifications16.2 Ω
Maximum on-state resistance (Ron)450 Ω
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP28,.6
Package shapeRECTANGULAR
Package formIN-LINE
power supply+-15 V
Certification statusNot Qualified
Maximum signal current0.02 A
Maximum supply current (Isup)2.4 mA
Nominal supply voltage (Vsup)15 V
surface mountNO
switchBREAK-BEFORE-MAKE
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Base Number Matches1
S E M I C O N D U C T O R
DG506A, DG507A
DG508A, DG509A
CMOS Analog Multiplexers
Description
The DG506A, DG507A, DG508A and DG509A are CMOS
monolithic 16-channel/dual 8-channel and 8-channel/dual
4-channel analog multiplexers, which can also be used as
demultiplexers. An enable input is provided. When the
enable input is high, a channel is selected by the address
inputs, and when low, all channels are off.
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks volt-
ages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
The DG506A, DG507A, DG508A and DG509A are pinout
compatible with the industry standard devices.
December 1993
Features
Low Power Consumption
TTL and CMOS Compatible Address and Enable Inputs
44V Maximum Power Supply Rating
High Latch-Up Immunity
Break-Before-Make Switching
Alternate Source
Applications
Data Acquisition Systems
Communication Systems
Signal Multiplexing/Demultiplexing
Audio Signal Multiplexing
Ordering Information
PART NUMBER
DG506AAK
DG506AAK/883B
DG506ABK
DG506ABY
DG506ACJ
DG506ACK
DG506ACY
DG507AAK
DG507AAK/883B
DG507ABK
DG507ABY
DG507ACJ
DG507ACK
DG507ACY
TEMP. RANGE
-55
o
C to +125
o
C
-55 C to +125 C
-25
o
C to +85
o
C
-25 C to +85 C
0
o
C to +70
o
C
0 C to +70 C
0
o
C to +70
o
C
-55 C to +125 C
-55
o
C to +125
o
C
-25 C to +85 C
-25
o
C to +85
o
C
0 C to +70 C
0
o
C to +70
o
C
0 C to +70 C
o
o
o
o
o
o
o
o
o
o
o
o
o
o
PACKAGE
28 Lead Ceramic DIP
28 Lead Ceramic DIP
28 Lead Ceramic DIP
28 Lead Plastic DIP
28 Lead Plastic DIP
28 Lead Ceramic DIP
28 Lead SOIC
28 Lead Ceramic DIP
28 Lead Ceramic DIP
28 Lead Ceramic DIP
28 Lead Plastic DIP
28 Lead Plastic DIP
28 Lead Ceramic DIP
28 Lead SOIC
PART NUMBER
DG508AAK
DG508AAK/883B
DG508ABK
DG508ABY
DG508ACJ
DG508ACK
DG508ACY
DG509AAK
DG509AAK/883B
DG509ABK
DG509ABY
DG509ACJ
DG509ACK
DG509ACY
TEMP. RANGE
-55 C to +125 C
-55 C to +125 C
-25 C to +85 C
-25 C to +85 C
0 C to +70 C
0 C to +70 C
0
o
C to +70
o
C
-55 C to +125 C
-55
o
C to +125
o
C
-25 C to +85 C
-25
o
C to +85
o
C
0 C to +70 C
0
o
C to +70
o
C
0 C to +70 C
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
PACKAGE
16 Lead Ceramic DIP
16 Lead Ceramic DIP
16 Lead Ceramic DIP
16 Lead Plastic DIP
16 Lead Plastic DIP
16 Lead Ceramic DIP
16 Lead SOIC (W)
16 Lead Ceramic DIP
16 Lead Ceramic DIP
16 Lead Ceramic DIP
16 Lead Plastic DIP
16 Lead Plastic DIP
16 Lead Ceramic DIP
16 Lead SOIC (W)
Pinouts
DG506A (PDIP, CDIP, SOIC)
TOP VIEW
V+
1
NC
2
NC
3
S
16
4
S
15
5
S
14
6
S
13
7
S
12
8
S
11
9
S
10
10
S
9
11
GND
12
NC
13
A
3
14
28
D
27
V-
26
S
8
25
S
7
24
S
6
23
S
5
22
S
4
21
S
3
20
S
2
19
S
1
18
EN
17
A
0
16
A
1
15
A
2
DG507A (PDIP, CDIP, SOIC)
TOP VIEW
V+
1
D
B
2
NC
3
S
8B
4
S
7B
5
S
6B
6
S
5B
7
S
4B
8
S
3B
9
S
2B
10
S
1B
11
GND
12
NC
13
NC
14
28
D
A
27
V-
26
S
8A
25
S
7A
24
S
6A
23
S
5A
22
S
4A
21
S
3A
20
S
2A
19
S
1A
18
EN
17
A
0
16
A
1
15
A
2
DG508A (PDIP, CDIP, SOIC)
TOP VIEW
A
0
1
EN 2
V- 3
S
1
4
S
2
5
S
3
6
S
4
7
D 8
16 A
1
15 A
2
14 GND
13 V+
12 S
5
11 S
6
10 S
7
9 S
8
DG509A (PDIP, CDIP, SOIC)
TOP VIEW
A
0
1
EN 2
V- 3
S
1A
4
S
2A
5
S
3A
6
S
4A
7
D
A
8
16 A
1
15 GND
14 V+
13 S
1B
12 S
2B
11 S
3B
10 S
4B
9 D
B
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
©
Harris Corporation 1993
File Number
3137
10-41
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