ZXMC4559DN8
COMPLEMENTARY 60V ENHANCEMENT MODE MOSFET
SUMMARY
N-Channel V
(BR)DSS
= 60V; R
DS(ON)
= 0.055 ; I
D
= 4.7A
P-Channel V
(BR)DSS
= -60V; R
DS(ON)
= 0.105 ; I
D
= -3.9A
DESCRIPTION
This new generation of TRENCH MOSFETs from Zetex utilizes a unique
structure that combines the benefits of low on-resistance with fast switching
speed. This makes them ideal for high efficiency, low voltage, power
management applications.
FEATURES
•
Low on-resistance
•
Fast switching speed
•
Low threshold
•
Low gate drive
•
Low profile SOIC package
SO8
APPLICATIONS
•
Motor Drive
•
LCD backlighting
Q1 = N-CHANNEL
Q2 = P-CHANNEL
ORDERING INFORMATION
DEVICE
ZXMC4559DN8TA
ZXMC4559DN8TC
REEL
7
’‘
13’‘
TAPE
WIDTH
12mm
12mm
QUANTITY
PER REEL
500 units
2500 units
PINOUT
DEVICE MARKING
•
ZXMC
4559
Top view
ISSUE 5 - MAY 2005
1
SEMICONDUCTORS
ZXMC4559DN8
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @V
GS
=10V; T
A
=25 C
@V
GS
=10V; T
A
=25 C
(b) (d)
@V
GS
=10V; T
A
=25 C
Pulsed Drain Current
(c)
(a) (d)
(b) (d)
SYMBOL N-Channel
V
DSS
V
GS
I
D
60
20
4.7
3.7
3.6
I
DM
I
S
I
SM
P
D
P
D
P
D
T
j
:T
stg
22.2
3.4
22.2
P-Channel
-60
20
-3.9
-2.8
-2.6
-18.3
-3.2
-18.3
UNIT
V
V
A
A
A
A
A
A
W
mW/°C
W
mW/°C
W
mW/°C
°C
Continuous Source Current (Body Diode)
(b)
Pulsed Source Current (Body Diode)(c)
Power Dissipation at TA=25°C
(a) (d)
Linear Derating Factor
Power Dissipation at TA=25°C
Linear Derating Factor
Power Dissipation at TA=25°C
Linear Derating Factor
(a) (e)
1.25
10
1.8
14
2.1
17
-55 to +150
(b) (d)
Operating and Storage Temperature Range
THERMAL RESISTANCE
PARAMETER
Junction to Ambient
Junction to Ambient
(a) (d)
(b) (e)
SYMBOL
R
JA
R
JA
R
JA
VALUE
100
69
58
UNIT
°C/W
°C/W
°C/W
Junction to Ambient
(b) (d)
Notes
(a) For a dual device surface mounted on 25mm x 25mm FR4 PCB with coverage of single sided 1oz copper in still air conditions.
(b) For a dual device surface mounted on FR4 PCB measured at t
10 sec.
(c) Repetitive rating 25mm x 25mm FR4 PCB, D=0.02 pulse width=300 s - pulse width limited by maximum junction temperature.
(d) For a device with one active die.
(e) For device with 2 active die running at equal power.
ISSUE 5 - MAY 2005
SEMICONDUCTORS
2
ZXMC4559DN8
CHARACTERISTICS
ISSUE 5 - MAY 2005
3
SEMICONDUCTORS
ZXMC4559DN8
N-CHANNEL
ELECTRICAL CHARACTERISTICS
(at T
amb
= 25°C unless otherwise stated).
PARAMETER
STATIC
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
Gate-Source Threshold Voltage
Static Drain-Source On-State
Resistance
(1)
Forward Transconductance
(1) (3)
DYNAMIC
(3)
SYMBOL
MIN.
TYP.
MAX.
UNIT CONDITIONS.
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
g
Q
gs
Q
gd
60
1.0
100
1.0
0.055
0.075
10.2
V
A
nA
V
I
D
=250 A, V
GS
=0V
V
DS
=60V, V
GS
=0V
V
GS
= 20V, V
DS
=0V
I =250 A, V
DS
= V
GS
D
V
GS
=10V, I
D
=4.5A
V
GS
=4.5V, I
D
=4.0A
S
V
DS
=15V,I
D
=4.5A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING
(2) (3)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Charge
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
SOURCE-DRAIN DIODE
Diode Forward Voltage
(1)
Reverse Recovery Time
(3)
Reverse Recovery Charge
NOTES
(1) Measured under pulsed conditions. Width
(3)
1063
104
64
pF
pF
pF
V
DS
=30V, V
GS
=0V,
f=1MHz
3.5
4.1
26.2
10.6
11.0
20.4
4.1
5.1
ns
ns
ns
ns
nC
nC
nC
nC
V
DS
=30V,V
GS
=10V,
I
D
=4.5A
V
DD
=30V, I
D
=1A
R
G
≅6.0
, V
GS
=10V
V
DS
=30V,V
GS
=5V,
I
D
=4.5A
V
SD
t
rr
Q
rr
0.85
22
21.4
1.2
V
ns
nC
T
J
=25°C, I
S
=5.5A,
V
GS
=0V
T
J
=25°C, I
F
=2.2A,
di/dt= 100A/ s
300 s. Duty cycle
2% .
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 5 - MAY 2005
SEMICONDUCTORS
4
ZXMC4559DN8
P-CHANNEL
ELECTRICAL CHARACTERISTICS
(at T
amb
= 25°C unless otherwise stated)
PARAMETER
STATIC
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
Gate-Source Threshold Voltage
Static Drain-Source On-State
Resistance
(1)
Forward Transconductance
(1) (3)
DYNAMIC
(3)
SYMBOL
MIN.
TYP.
MAX.
UNIT CONDITIONS
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
g
Q
gs
Q
gd
V
SD
t
rr
-60
-1.0
100
-1.0
0.085
0.125
7.2
V
A
nA
V
I
D
=-250 A, V
GS
=0V
V
DS
=-60V, V
GS
=0V
V
GS
= 20V, V
DS
=0V
I =-250 A, V
DS
= V
GS
D
V
GS
=-10V, I
D
=-2.9A
V
GS
=-4.5V, I
D
=-2.4A
S
V
DS
=-15V,I
D
=-2.9A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING
(2) (3)
1021
83.1
56.4
pF
pF
pF
V
DS
=-30 V, V
GS
=0V,
f=1MHz
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Charge
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
SOURCE-DRAIN DIODE
Diode Forward Voltage
(1)
Reverse Recovery Time
(3)
Reverse Recovery Charge
(3)
3.5
4.1
35
10
12.1
24.2
2.5
3.7
ns
ns
ns
ns
nC
nC
nC
nC
V
DS
=-30V,V
GS
=-5V,
I
D
=-2.9A
V
DS
=-30V,V
GS
=-10V,
I
D
=-2.9A
V
DD
=-30V, I
D
=-1A
R
G
6.0 , V
GS
=-10V
-0.85
29.2
39.6
-0.95
V
ns
nC
T
J
=25°C, I
S
=-3.4A,
V
GS
=0V
T
J
=25°C, I
F
=-2A,
di/dt= 100A/µs
Q
rr
NOTES
(1) Measured under pulsed conditions. Width
300 s. Duty cycle
2% .
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
ISSUE 5 - MAY 2005
5
SEMICONDUCTORS
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