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MC14094BDT

Description
4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16
Categorylogic    logic   
File Size114KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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MC14094BDT Overview

4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16

MC14094BDT Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP16,.25
Contacts16
Reach Compliance Codeunknow
Counting directionRIGHT
series4000/14000/40000
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length5 mm
Logic integrated circuit typeSERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Su1250000 Hz
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5/15 V
propagation delay (tpd)840 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width4.4 mm
minfmax3 MHz
MC14094B
8-Stage Shift/Store Register
with Three-State Outputs
The MC14094B combines an 8–stage shift register with a data latch
for each stage and a three–state output from each latch.
Data is shifted on the positive clock transition and is shifted from the
seventh stage to two serial outputs. The Q
S
output data is for use in
high–speed cascaded systems. The Q′
S
output data is shifted on the
following negative clock transition for use in low–speed cascaded
systems.
Data from each stage of the shift register is latched on the negative
transition of the strobe input. Data propagates through the latch while
strobe is high.
Outputs of the eight data latches are controlled by three–state
buffers which are placed in the high–impedance state by a logic Low
on Output Enable.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
MC14094BCP
AWLYYWW
1
16
SOIC–16
D SUFFIX
CASE 751B
1
16
TSSOP–16
DT SUFFIX
CASE 948F
1
16
SOEIAJ–16
F SUFFIX
CASE 966
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
MC14094B
AWLYWW
14
094B
ALYW
14094B
AWLYWW
Three–State Outputs
Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
Input Diode Protection
Data Latch
Dual Outputs for Data Out on Both Positive and
Negative Clock Transitions
Useful for Serial–to–Parallel Data Conversion
Pin–for–Pin Compatible with CD4094B
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 2.)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 3.)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8–Second Soldering)
Value
– 0.5 to +18.0
– 0.5 to V
DD
+ 0.5
±
10
500
– 55 to +125
– 65 to +150
260
Unit
V
V
mA
mW
ORDERING INFORMATION
°C
°C
°C
Device
MC14094BCP
MC14094BD
MC14094BDR2
MC14094BDT
MC14094BDTR2
MC14094BF
Package
PDIP–16
SOIC–16
SOIC–16
TSSOP–16
TSSOP–16
SOEIAJ–16
Shipping
2000/Box
48/Rail
2500/Tape & Reel
96/Rail
2500/Tape & Reel
See Note 1.
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
v
v
1. For ordering information on the EIAJ version of the
SOIC packages, please contact your local ON
Semiconductor representative.
©
Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14094B/D

MC14094BDT Related Products

MC14094BDT MC14094
Description 4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16
Counting direction RIGHT RIGHT
series 4000/14000/40000 4000/14000/40000
length 5 mm 19.18 mm
Number of digits 8 8
Number of functions 1 1
Number of terminals 16 16
Maximum operating temperature 125 °C 125 Cel
Minimum operating temperature -55 °C -55 Cel
Output characteristics 3-STATE 3-STATE
Output polarity TRUE TRUE
surface mount YES NO
Temperature level MILITARY MILITARY
Terminal form GULL WING THROUGH-HOLE
Terminal location DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE
width 4.4 mm 7.62 mm

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