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EP20K100RC208-1V

Description
Loadable PLD, 0.3ns, CMOS, PQFP208, 30.40 X 30.40 MM, 0.50 MM PITCH, RQFP-208
CategoryProgrammable logic devices    Programmable logic   
File Size4MB,208 Pages
ManufacturerAltera (Intel)
Download Datasheet Parametric View All

EP20K100RC208-1V Overview

Loadable PLD, 0.3ns, CMOS, PQFP208, 30.40 X 30.40 MM, 0.50 MM PITCH, RQFP-208

EP20K100RC208-1V Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAltera (Intel)
Parts packaging codeQFP
package instructionHFQFP, QFP208,1.2SQ,20
Contacts208
Reach Compliance Codecompliant
maximum clock frequency100 MHz
JESD-30 codeS-PQFP-G208
JESD-609 codee3
length28 mm
Dedicated input times4
Number of I/O lines159
Number of entries153
Number of logical units4160
Output times153
Number of terminals208
Maximum operating temperature85 °C
Minimum operating temperature
organize4 DEDICATED INPUTS, 159 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeHFQFP
Encapsulate equivalent codeQFP208,1.2SQ,20
Package shapeSQUARE
Package formFLATPACK, HEAT SINK/SLUG, FINE PITCH
power supply2.5,2.5/3.3 V
Programmable logic typeLOADABLE PLD
propagation delay0.3 ns
Certification statusNot Qualified
Maximum seat height4.1 mm
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
width28 mm
Base Number Matches1

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