PD -97144A
IRFS3107PbF
IRFSL3107PbF
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
D
HEXFET
®
Power MOSFET
V
DSS
R
DS(on)
typ.
max.
I
D
(Silicon Limited)
I
D
(Package Limited)
D
75V
2.5m
:
3.0m
:
230A
c
195A
S
D
S
G
G
D
S
D
2
Pak
IRFS3107PbF
TO-262
IRFSL3107PbF
G
D
S
Gate
Drain
Max.
230c
160
195
900
370
2.5
± 20
14
-55 to + 175
300
10lbxin (1.1Nxm)
300
See Fig. 14, 15, 22a, 22b,
Source
Units
A
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
e
Avalanche Current
d
Repetitive Avalanche Energy
g
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
Parameter
Junction-to-Case
kl
Junction-to-Ambient (PCB Mount)
jk
Typ.
–––
–––
Max.
0.40
40
Units
°C/W
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1
5/2/11
IRFS/SL3107PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
ΔV
(BR)DSS
/ΔT
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Min. Typ. Max. Units
75
–––
–––
2.0
–––
–––
–––
–––
–––
–––
0.09
2.5
–––
–––
–––
–––
–––
1.2
–––
–––
3.0
4.0
20
250
100
-100
–––
Conditions
V V
GS
= 0V, I
D
= 250μA
V/°C Reference to 25°C, I
D
= 5mAd
mΩ V
GS
= 10V, I
D
= 140A
g
V V
DS
= V
GS
, I
D
= 250μA
μA
V
DS
= 75V, V
GS
= 0V
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Min. Typ. Max. Units
–––
160
38
54
106
19
110
99
100
9370
840
580
1130
1500
–––
240
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 50V, I
D
= 140A
I
D
= 140A
V
DS
=38V
V
GS
= 10V
g
I
D
= 140A, V
DS
=0V, V
GS
= 10V
V
DD
= 49V
I
D
= 140A
R
G
= 2.7Ω
V
GS
= 10V
g
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 60V
i,
See Fig. 11
V
GS
= 0V, V
DS
= 0V to 60V
h
230
–––
–––
–––
–––
Turn-On Delay Time
–––
Rise Time
–––
Turn-Off Delay Time
–––
Fall Time
–––
Input Capacitance
–––
Output Capacitance
–––
Reverse Transfer Capacitance
–––
Effective Output Capacitance (Energy Related) –––
Effective Output Capacitance (Time Related)h –––
ns
pF
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
d
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
––– 230c
–––
900
A
A
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
––– –––
1.3
V
–––
54
–––
ns
–––
60
–––
––– 103 –––
nC
T
J
= 125°C
––– 132 –––
–––
3.6
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 140A, V
GS
= 0V
g
V
R
= 64V,
T
J
= 25°C
I
F
= 140A
T
J
= 125°C
di/dt = 100A/μs
g
T
J
= 25°C
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.045mH
R
G
= 25Ω, I
AS
= 140A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
140A, di/dt
≤
1380A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C
R
θJC
value shown is at time zero.
2
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IRFS/SL3107PbF
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
ID, Drain-to-Source Current (A)
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
100
4.5V
4.5V
≤
60μs PULSE WIDTH
Tj = 25°C
10
0.1
1
10
100
≤
60μs PULSE WIDTH
Tj = 175°C
10
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
2.5
Fig 2.
Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
ID = 140A
2.0
ID, Drain-to-Source Current
(Α)
VGS = 10V
100
TJ = 175°C
(Normalized)
TJ = 25°C
10
1.5
1.0
VDS = 25V
≤
60μs PULSE WIDTH
1
2.0
3.0
4.0
5.0
6.0
7.0
0.5
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
16000
VGS = 0V,
f = 100 kHz
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
16
VGS, Gate-to-Source Voltage (V)
ID= 140A
12
VDS = 60V
VDS = 38V
12000
C, Capacitance (pF)
Ciss
8000
8
4000
4
Coss
Crss
0
1
10
100
0
0
40
80
120
160
200
240
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS/SL3107PbF
1000
10000
ID, Drain-to-Source Current (A)
TJ = 175°C
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100μsec
ISD , Reverse Drain Current (A)
100
1000
1msec
10msec
10
LIMITED BY PACKAGE
100
10
TJ = 25°C
1
1
VGS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
2.5
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
DC
0.1
100
VSD, Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage
Fig 8.
Maximum Safe Operating Area
100
250
LIMITED BY PACKAGE
200
ID , Drain Current (A)
ID = 5mA
90
150
100
80
50
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
70
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
4.0
Fig 10.
Drain-to-Source Breakdown Voltage
1400
EAS, Single Pulse Avalanche Energy (mJ)
1200
1000
800
600
400
200
0
3.0
21A
49A
BOTTOM
140A
TOP
ID
Energy (μJ)
2.0
1.0
0.0
0
20
40
60
80
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFS/SL3107PbF
1
Thermal Response ( Z thJC )
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
C
τ
2
τ
3
τ
3
τ
0.01
Ri (°C/W)
τι
(sec)
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci=
τi/Ri
0.047711 0.000071
0.16314 0.000881
0.189304 0.007457
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj
= 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
100
0.01
0.05
10
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
350
300
EAR , Avalanche Energy (mJ)
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 140A
250
200
150
100
50
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Starting TJ , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy vs. Temperature
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