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CAT28F512G12

Description
Flash Memory 64 X 8 512K 120ns
Categorystorage    storage   
File Size90KB,16 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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CAT28F512G12 Overview

Flash Memory 64 X 8 512K 120ns

CAT28F512G12 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeQFJ
package instructionQCCJ, LDCC32,.5X.6
Contacts32
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time120 ns
command user interfaceYES
Data pollingNO
Durability100000 Write/Erase Cycles
JESD-30 codeR-PQCC-J32
JESD-609 codee3
length13.97 mm
memory density524288 bit
Memory IC TypeFLASH
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals32
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize64KX8
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC32,.5X.6
Package shapeRECTANGULAR
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Programming voltage12 V
Certification statusNot Qualified
Maximum seat height3.55 mm
Maximum standby current0.00001 A
Maximum slew rate0.03 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
switch bitNO
typeNOR TYPE
width11.43 mm
CAT28F512
512K-Bit CMOS Flash Memory
FEATURES
s
Fast Read Access Time: 90/120/150 ns
s
Low Power CMOS Dissipation:
Licensed Intel
second source
s
Commercial, Industrial and Automotive
Temperature Ranges
s
Stop Timer for Program/Erase
s
On-Chip Address and Data Latches
s
JEDEC Standard Pinouts:
–Active: 30 mA max (CMOS/TTL levels)
–Standby: 1 mA max (TTL levels)
–Standby: 100
µ
A max (CMOS levels)
s
High Speed Programming:
–10
µ
s per byte
–1 Sec Typ Chip Program
s
12.0V
±
5% Programming and Erase Voltage
–32-pin DIP
–32-pin PLCC
–32-pin TSOP ( 8 x 20)
s
100,000 Program/Erase Cycles
s
10 Year Data Retention
s
"Green" Package Options Available
s
Electronic Signature
DESCRIPTION
The CAT28F512 is a high speed 64K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and EEPROM devices. Programming and Erase
are performed through an operation and verify algo-
rithm. The instructions are input via the I/O bus, using a
two write cycle scheme. Address and Data are latched
to free the I/O bus and address bus during the write
operation.
The CAT28F512 is manufactured using Catalyst’s ad-
vanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
BLOCK DIAGRAM
I/O0–I/O7
I/O BUFFERS
ERASE VOLTAGE
SWITCH
WE
COMMAND
REGISTER
PROGRAM VOLTAGE
SWITCH
CE, OE LOGIC
DATA
LATCH
SENSE
AMP
CE
OE
ADDRESS LATCH
Y-GATING
Y-DECODER
524,288 BIT
MEMORY
ARRAY
A0–A15
X-DECODER
VOLTAGE VERIFY
SWITCH
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-1084, Rev. K

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Description Flash Memory 64 X 8 512K 120ns Flash Memory 64 X 8 512K Flash Memory 64 X 8 512K 90ns Flash Memory 64 X 8 512K 120ns Flash Memory 64 X 8 512K 90ns
Is it Rohs certified? conform to incompatible conform to conform to conform to
Parts packaging code QFJ QFJ QFJ QFJ QFJ
package instruction QCCJ, LDCC32,.5X.6 PLASTIC, LCC-32 QCCJ, LDCC32,.5X.6 QCCJ, LDCC32,.5X.6 QCCJ, LDCC32,.5X.6
Contacts 32 32 32 32 32
Reach Compliance Code compliant not_compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
Maximum access time 120 ns 90 ns 90 ns 120 ns 90 ns
command user interface YES YES YES YES YES
Data polling NO NO NO NO NO
Durability 100000 Write/Erase Cycles 100000 Write/Erase Cycles 100000 Write/Erase Cycles 100000 Write/Erase Cycles 100000 Write/Erase Cycles
JESD-30 code R-PQCC-J32 R-PQCC-J32 R-PQCC-J32 R-PQCC-J32 R-PQCC-J32
JESD-609 code e3 e0 e3 e3 e3
length 13.97 mm 13.97 mm 13.97 mm 13.97 mm 13.97 mm
memory density 524288 bit 524288 bit 524288 bit 524288 bit 524288 bit
Memory IC Type FLASH FLASH FLASH FLASH FLASH
memory width 8 8 8 8 8
Number of functions 1 1 1 1 1
Number of terminals 32 32 32 32 32
word count 65536 words 65536 words 65536 words 65536 words 65536 words
character code 64000 64000 64000 64000 64000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 85 °C 85 °C 70 °C
organize 64KX8 64KX8 64KX8 64KX8 64KX8
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ QCCJ QCCJ QCCJ QCCJ
Encapsulate equivalent code LDCC32,.5X.6 LDCC32,.5X.6 LDCC32,.5X.6 LDCC32,.5X.6 LDCC32,.5X.6
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 260 240 260 260 245
power supply 5 V 5 V 5 V 5 V 5 V
Programming voltage 12 V 12 V 12 V 12 V 12 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 3.55 mm 3.55 mm 3.55 mm 3.55 mm 3.55 mm
Maximum standby current 0.00001 A 0.00001 A 0.00001 A 0.00001 A 0.00001 A
Maximum slew rate 0.03 mA 0.03 mA 0.03 mA 0.03 mA 0.03 mA
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface MATTE TIN TIN LEAD Tin (Sn) Tin (Sn) MATTE TIN
Terminal form J BEND J BEND J BEND J BEND J BEND
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location QUAD QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 40 30 40 40 40
switch bit NO NO NO NO NO
type NOR TYPE NOR TYPE NOR TYPE NOR TYPE NOR TYPE
width 11.43 mm 11.43 mm 11.43 mm 11.43 mm 11.43 mm
Maker ON Semiconductor - ON Semiconductor ON Semiconductor ON Semiconductor
Humidity sensitivity level 3 - 3 3 3
Base Number Matches - 1 1 1 1

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