PCF8531
34 x 128 pixel matrix driver
Rev. 8 — 12 September 2014
Product data sheet
1. General description
The PCF8531 is a low-power CMOS
1
LCD row and column driver, designed to drive dot
matrix graphic displays at multiplex rates of 1:17, 1:26, and 1:34. Furthermore, it can drive
up to 128 icons. All necessary functions for the display are provided in a single chip,
including on-chip generation of V
LCD
and the LCD bias voltages, resulting in a minimum of
external components and low power consumption. The PCF8531 is compatible with most
microcontrollers and communicates via a two-line bidirectional I
2
C-bus. All inputs are
CMOS compatible.
Remark:
The icon mode is used to reduce current consumption. When only icons are
displayed, a much lower operating voltage (V
LCD
) can be used and the switching
frequency of the LCD outputs is reduced. In most applications it is possible to use V
DD
as
V
LCD
.
For a selection of NXP LCD graphic drivers, see
Table 20 on page 48.
2. Features and benefits
Single-chip LCD controller and driver
34 row and 128 column outputs
Display data RAM 34
128 bits
128 icons (last row is used for icons)
Fast-mode I
2
C-bus interface (400 kbit/s)
Software selectable multiplex rates: 1:17, 1:26, and 1:34
Icon mode with multiplex rate 1:2:
Featuring reduced current consumption while displaying icons only
On-chip:
Generation of V
LCD
(external supply also possible)
Selectable linear temperature compensation
Oscillator requires no external components (external clock also possible)
Generation of intermediate LCD bias voltages
Power-On Reset (POR)
No external components required
Software selectable bias configuration
Logic supply voltage range V
DD1
to V
SS1
: 1.8 V to 5.5 V
Supply voltage range for on-chip voltage generator V
DD2
and V
DD3
to V
SS1
and V
SS2
:
2.5 V to 4.5 V
Display supply voltage range V
LCD
to V
SS
:
1.
The definition of the abbreviations and acronyms used in this data sheet can be found in
Section 21.
NXP Semiconductors
PCF8531
34 x 128 pixel matrix driver
Normal mode: 4 V to 9 V
Icon mode: 3 V to 9 V
Low-power consumption, suitable for battery operated systems
CMOS compatible inputs
Manufactured in silicon gate CMOS process
3. Applications
Telecommunication systems
Automotive information systems
Point-of-sale terminals
Instrumentation
4. Ordering information
Table 1.
Ordering information
Package
Name
PCF8531U/2DA/1
-
Description
chip with bumps in tray
Version
-
Type number
4.1 Ordering options
Table 2.
Ordering options
Orderable part number Sales item
(12NC)
PCF8531U/2DA/1,026
935286602026
Delivery form
chips in tray
IC
revision
1
Product type number
PCF8531U/2DA/1
PCF8531
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 8 — 12 September 2014
2 of 56
NXP Semiconductors
PCF8531
34 x 128 pixel matrix driver
6. Pinning information
6.1 Pinning
Viewed from active side. The positioning of the bonding pads is not to scale.
Fig 2.
PCF8531
Bonding pad location for PCF8531
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 8 — 12 September 2014
4 of 56
NXP Semiconductors
PCF8531
34 x 128 pixel matrix driver
Table 3.
Pad allocation table
Input or input/output pins must always be at a defined level (V
SS
or V
DD
) unless otherwise specified.
Pad
15
16
17 to 23
24 to 30
31
32 to 34
35 to 42
43 to 49
50 to 51
Symbol
OSC
V
LCDSENSE
V
LCDOUT
V
LCDIN
RES
V
DD3
V
DD2
V
DD1
SDA
Pad
55
56
57 to 63
64 to 70
71
72
73 to 74
78
87 to 103
Symbol
ENR
T4
V
SS2
V
SS1
T3
T1
SCL
T2
R0, R2, R4, R6, R8,
R10, R12, R14, R16,
R18, R20, R22, R24,
R26, R28, R30, R32
C0 to C127
R33, R31, R29, R27,
R25, R23, R21, R19,
R17, R15, R13, R11,
R9, R7, R5, R3, R1
52
54
SDACK
SA0
104 to 231
232 to 248
Fig 3.
Alignment markers
Table 4.
Alignment markers for PCF8531
All x/y coordinates represent the position of the center of each pad with respect to the center
(x/y = 0) of the chip (see
Figure 2).
Alignment marks
C1
C2
F
circle 1
circle 2
x (m)
5402.0
5292.4
5890.3
5543.0
5637.4
All information provided in this document is subject to legal disclaimers.
y (m)
823.1
823.4
401.9
798.4
798.4
© NXP Semiconductors N.V. 2014. All rights reserved.
PCF8531
Product data sheet
Rev. 8 — 12 September 2014
5 of 56
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