EEWORLDEEWORLDEEWORLD

Part Number

Search

EMRA51G2H-4000M

Description
Standard Clock Oscillators Programmable Oscillator 4.000MHz SMD 1.6mm x 2.0mm 25ppm -20 C to +70 C
CategoryPassive components   
File Size803KB,6 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Download Datasheet Parametric View All

EMRA51G2H-4000M Online Shopping

Suppliers Part Number Price MOQ In stock  
EMRA51G2H-4000M - - View Buy Now

EMRA51G2H-4000M Overview

Standard Clock Oscillators Programmable Oscillator 4.000MHz SMD 1.6mm x 2.0mm 25ppm -20 C to +70 C

EMRA51G2H-4000M Parametric

Parameter NameAttribute value
Product CategoryStandard Clock Oscillators
ManufacturerECLIPTEK
ProductMEMS Oscillators
EMRA51G2H-4.000M
REGULATORY COMPLIANCE
2011/65 +
2015/863
(Data Sheet downloaded on Jan 12, 2018)
174 SVHC
ITEM DESCRIPTION
MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 1.6mm x 2.0mm Plastic Surface Mount (SMD) 4.000MHz ±25ppm over
-20°C to +70°C
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Aging at 25°C
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Output Control Function
Output Control Input Voltage Logic
High (Vih)
Output Control Input Voltage Logic
Low (Vil)
Tri-State Output Enable Time
Tri-State Output Disable Time
Period Jitter (RMS)
RMS Phase Jitter (Fj = 900kHz to
7.5MHz; Random)
RMS Phase Jitter (Fj = 12kHz to
20MHz; Random)
Start Up Time
Storage Temperature Range
4.000MHz
±25ppm Maximum over -20°C to +70°C (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability
over the Operating Temperature Range, Supply Voltage Change, and Output Load Change)
±1.5ppm Maximum First Year
1.8Vdc ±10%
4.5mA Maximum (No Load)
90% of Vdd Minimum (IOH = -2mA)
10% of Vdd Maximum (IOL = +2mA)
1.5nSec Typical, 3.5nSec Maximum (Measured from 20% to 80% of waveform)
50 ±5(%) (Measured at 50% of waveform)
15pF Maximum
CMOS
Tri-State (Disabled Output: High Impedance)
70% of Vdd Minimum or No Connect to Enable Output
30% of Vdd Maximum to Disable Output
150nSec Maximum
150nSec Maximum
2pSec Typical, 5pSec Maximum
0.5pSec Typical, 1pSec Maximum
1.5pSec Typical, 3pSec Maximum
5mSec Maximum
-65°C to +150°C
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Flammability
Mechanical Shock
Moisture Sensitivity
Solderability
Temperature Cycling
Vibration
JESD22-A114, HBM, 2000V
UL94-V0
MIL-STD-883, Method 2002, Condition E, 10,000G
J-STD-020, MSL 1
MIL-STD-883, Method 2003 (Four I/O Pads on bottom of package only)
JESD22-A104, Condition B
MIL-STD-883, Method 2007, Condition A, 20G
www.ecliptek.com | Specification Subject to Change Without Notice | Revision C 03/31/2014 | Page 1 of 6
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
Kelvin resistor and resistance measurement
[i=s]This post was last edited by bigbat on 2020-4-11 15:54[/i]Kelvin resistance measurement Suppose we want to measure the resistance of a component that is far away from the ohmmeter. This will caus...
bigbat Analog electronics
Today's Shanghai Auto Show was dominated by the Tesla rights activist female owner
Today, a female car owner appeared at the Tesla booth at the Shanghai Auto Show. She was wearing a white T-shirt with "Brake Failure" written on it. She stood on the roof of the car and shouted "Tesla...
eric_wang Talking
Combination of TM1640 and PIC12F629 microcontroller
[size=3][color=#000000][backcolor=white]TM1640 is a dedicated integrated circuit for driving digital tubes. It can directly drive 16-bit common cathode digital tubes. Please download the attached manu...
灞波儿奔 Microcontroller MCU
Detailed Design of Multi-Frequency Busy Tone Detection Using DSP
A busy tone is a tone that appears when a single tone of a certain frequency and silence interact, usually used to indicate that the phone is busy. In some practical applications, this busy tone needs...
Aguilera DSP and ARM Processors
Altium Designer 19 is here! Download the installation package, cracking pictures and full installation video tutorial, hurry up!
[i=s]This post was last edited by qwqwqw2088 on 2018-10-6 11:32[/i] [size=4]Altium designer 19 has been released. The software is only for everyone's learning. [b]Statement: Do not use it for commerci...
qwqwqw2088 PCB Design
Why is the clock triggered by the rising edge in the VHDL source program, but the waveform is triggered by the falling edge in the modelsim simulation? ...
[align=left][b][font="][size=14pt]1[font=宋体]、[/font][font=Times New Roman]Cnt_6[/font][font=宋体]的[/font][font=Times New Roman]VHDL[/font][font=宋体]源代码如下:[/font][/size][/font][/b][/align][align=left]libr...
dy_dsm FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号