LET16045C
RF power transistor from the LdmoST family
of n-channel enhancement-mode lateral MOSFETs
Datasheet
-
production data
Features
•
Excellent thermal stability
•
Common source configuration
•
P
OUT
(@28 V) = 45 W with 16 dB gain @ 1600
MHz
•
BeO free package
M243
epoxy sealed
•
In compliance with the 2002/95/EC European
directive
Description
Figure 1. Pin out
The LET16045C is a common source N-channel
enhancement-mode lateral field-effect RF power
transistor designed for broadband commercial
and industrial applications at frequencies up to
1.6 GHz. The LET16045C is designed for high
gain and broadband performance operating in
common source mode at 28 V. It is ideal for
INMARSAT satellite communications.
1
3
2
1. Drain
2. Gate
3. Source
Table 1. Device summary
Order code
LET16045C
Package
M243
Branding
LET16045C
April 2014
This is information on a product in full production.
DocID022224 Rev 3
1/9
www.st.com
Maximum ratings
LET16045C
1
Maximum ratings
Table 2. Absolute maximum ratings (T
CASE
= 25 °C)
Symbol
V
(BR)DSS
V
GS
I
D
P
DISS
T
J
T
STG
Drain-source voltage
Gate-source voltage
Drain current
Power dissipation (@ T
C
= 70 °C)
Max. operating junction temperature
Storage temperature
Parameter
Value
80
-0.5 to +15
9
100
200
-65 to +150
Unit
V
V
A
W
°C
°C
Table 3. Thermal data
Symbol
R
th(JC)
Parameter
Junction-case thermal resistance
Value
1.3
Unit
°C/W
2/9
DocID022224 Rev 3
LET16045C
Electrical characteristics
2
Electrical characteristics
T
C
= 25 °C
Table 4. Static
Symbol
Test conditions
Min.
80
1
1
2.0
5.0
1.1
2.5
58
29
0.8
Typ.
Max.
Unit
V
μA
μA
V
V
mho
pF
pF
pF
V
(BR)DSS
V
GS
= 0 V; I
DS
= 10 mA
I
DSS
I
GSS
V
GS(Q)
V
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
V
GS
= 0 V; V
DS
= 28 V
V
GS
= 20 V; V
DS
= 0 V
V
DS
= 28 V; I
D
= 300 mA
V
GS
= 10 V; I
D
= 3 A
V
DS
= 10 V; I
D
= 3 A
V
GS
= 0 V; V
DS
= 28 V; f = 1 MHz
V
GS
= 0 V; V
DS
= 28 V; f = 1 MHz
V
GS
= 0 V; V
DS
= 28 V; f = 1 MHz
Table 5. Dynamic
Symbol
P
OUT
G
PS
h
D
Test conditions
V
DD
= 28 V; I
DQ
= 400 mA; P
IN
= 2 W
V
DD
= 28 V; I
DQ
= 400 mA; P
OUT
= 45 W
V
DD
= 28 V; I
DQ
= 400 mA; P
OUT
= 45 W
Min.
45
15
50
Typ.
54
16
55
20:1
-
Max.
Unit
W
dB
%
VSWR
Load
V
DD
= 28 V; I
DQ
= 400 mA; P
OUT
= 50 W; f = 1600 MHz
mismatch All phase angles
Table 6. Impedance data
Frequency (MHz)
1600
Z source (Ω)
1.1 - j1.6
Z load (Ω)
1.1 - j0.6
DocID022224 Rev 3
3/9
9
Typical performances
LET16045C
3
Typical performances
Figure 2. Gain and efficiency vs output power Figure 3. Gain vs ouptut power and bias current
24
22
20
Gain (dB)
Gain
Efficiency
80
70
60
Efficiency (%)
24
22
20
Gain (dB)
Idq = 100mA
Idq = 400 mA
Idq = 600 mA
18
16
14
12
10
8
0
10
20
30
40
50
60
Output Power (W)
Freq = 1600 MHz
V
DD
= 28V
I
DQ
= 400 mA
50
40
30
20
10
0
18
16
14
12
10
8
0
10
20
30
40
50
60
70
Output Power (W)
Freq = 1600 MHz
V
DD
= 28V
AM02167V2
AM10213V1
Figure 4. Ouptut power vs drain supply voltage
75
70
65
60
55
50
45
40
35
30
25
22
24
Output power (W)
Freq = 1600 MHz
I
DQ
= 400 mA
Pin = 2W
Pin = 1.5W
Pin = 2.5W
26
28
30
32
34
AM10214V1
Supply voltage (V)
4/9
DocID022224 Rev 3
LET16045C
Board layout, schematic and BOM
4
Board layout, schematic and BOM
Figure 5. Board layout
C11
C10
R1
VGG
FB2
C13
R2
TL1
+
C
C13
B1
R1
R2
B2
R3
C12
L1
C1
C2
C3
+
B4
B3
C9
C8
C4
L2
C7
+
+
C1
+
STMicroelectronics, Inc.
LET16045
LOG xxxx
REV
INPUT
C6
C5
C
STMicroelectronics, Inc.
LET16045
LOG xxxx
REV
OUTPUT
GIPG290420140950FSR
Figure 6. Schematic
FB1
R3
FB3
Vdd
C11
C10
L2
L1
C9
C8
FB4
C12
TL7
TL2
C2
C3
TL3
TL4
TL5
TL6
DUT
C4
TL8
TL9
TL10
TL11
C7
TL12
C5
C6
GIPG290420140944FSR
DocID022224 Rev 3
5/9
9
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