SPC56AP60x, SPC56AP54x
SPC560P60x, SPC560P54x
32-bit Power Architecture
®
based MCU with 1088KB Flash memory
and 80KB RAM for automotive chassis and safety applications
Datasheet
-
production data
General purpose I/Os (80 GPIO + 26 GPI on
LQFP144; 49 GPIO + 16 GPI on LQFP100)
2 general purpose eTimer units
– 6 timers, each with up/down count
capabilities
– 16-bit resolution, cascadable counters
– Quadrature decode with rotation direction
flag
– Double buffer input capture and output
compare
Communications interfaces
– 2 LINFlex modules (LIN 2.1,
1 × Master/Slave, 1 × Master Only)
– 5 DSPI modules with automatic chip select
generation
– 2 FlexCAN interfaces (2.0B Active) with 32
message buffers
– 1 Safety port based on FlexCAN; usable as
third CAN when not used as safety port
– 1 FlexRay™ module (V2.1) with dual or
single channel, 64 message buffers and up
to 10 Mbit/s
2 CRC units with three contexts and 3
hardwired polynomials(CRC8,CRC32 and
CRC-16-CCITT)
10-bit A/D converter
– 27 input channels and pre-sampling feature
– Conversion time < 1 µs including sampling
time at full precision
– Programmable cross triggering unit (CTU)
– 4 analog watchdog with interrupt capability
On-chip CAN/UART Bootstrap loader with boot
assist module (BAM)
Ambient temperature ranges: –40 to 125 °C or
–40 to 105 °C
LQFP100
14 x 14 mm
LQFP144
20 x 20 mm
Features
AEC-Q10x qualified
64 MHz, single issue, 32-bit CPU core complex
(e200z0h)
– Compliant with Power Architecture
®
embedded category
– Variable Length Encoding (VLE)
Memory organization
– Up to 1024 KB on-chip code Flash memory
with additional 64 KB for EEPROM
emulation (data flash), with ECC, with
erase/program controller
– Up to 80 KB on-chip SRAM with ECC
Fail safe protection
– ECC protection on system SRAM and
Flash
– Safety port
– SWT with servicing sequence pseudo-
random generator
– Power management
– Non-maskable interrupt for both cores
– Fault collection and control unit (FCCU)
– Safe mode of system-on-chip (SoC)
– Register protection scheme
Nexus
®
L2+ interface
Single 3.3 V or 5 V supply for I/Os and ADC
2 on-platform peripherals set with 2 INTC
16-channel eDMA controller with multiple
transfer request sources
June 2016
This is information on a product in full production.
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SPC56xP54x, SPC56xP60x
Table 1. Device summary
Part number
Package
768 KB Flash
LQFP144
LQFP100
SPC560P54L5
SPC56AP54L5
SPC560P54L3
SPC56AP54L3
1 MB Flash
SPC560P60L5
SPC56AP60L5
SPC560P60L3
SPC56AP60L3
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Contents
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.1
1.2
1.3
1.4
1.5
Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
1.5.7
1.5.8
1.5.9
1.5.10
1.5.11
1.5.12
1.5.13
1.5.14
1.5.15
1.5.16
1.5.17
1.5.18
1.5.19
1.5.20
1.5.21
1.5.22
1.5.23
1.5.24
1.5.25
1.5.26
1.5.27
1.5.28
High performance e200z0h core processor . . . . . . . . . . . . . . . . . . . . . . 14
Crossbar switch (XBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Enhanced direct memory access (eDMA) . . . . . . . . . . . . . . . . . . . . . . . 15
On-chip flash memory with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
On-chip SRAM with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Interrupt controller (INTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
System clocks and clock generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Frequency modulated phase-locked loop (FMPLL) . . . . . . . . . . . . . . . . 17
Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Internal RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Periodic interrupt timer (PIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
System timer module (STM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Software watchdog timer (SWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Fault collection and control unit (FCCU) . . . . . . . . . . . . . . . . . . . . . . . . 19
System integration unit (SIUL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Boot and censorship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Error correction status module (ECSM) . . . . . . . . . . . . . . . . . . . . . . . . . 20
FlexCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Safety port (FlexCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
FlexRay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Serial communication interface module (LINFlex) . . . . . . . . . . . . . . . . . 22
Deserial serial peripheral interface (DSPI) . . . . . . . . . . . . . . . . . . . . . . 22
eTimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Cross triggering unit (CTU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Cyclic redundancy check (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Nexus development interface (NDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
IEEE 1149.1 (JTAG) controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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Contents
1.5.29
SPC56xP54x, SPC56xP60x
On-chip voltage regulator (VREG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 27
2.1
2.2
Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.2.1
2.2.2
2.2.3
Power supply and reference voltage pins . . . . . . . . . . . . . . . . . . . . . . . 29
System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.5.1
General notes for specifications at maximum junction temperature . . . 56
Electromagnetic interference (EMI) characteristics . . . . . . . . . . . . . . . . . 58
Electrostatic discharge (ESD) characteristics . . . . . . . . . . . . . . . . . . . . . 58
Power management electrical characteristics . . . . . . . . . . . . . . . . . . . . . 58
3.8.1
3.8.2
Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 58
Voltage monitor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 60
3.9
3.10
3.11
Power Up/Down sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.10.1
3.11.1
3.11.2
3.11.3
NVUSRO[PAD3V5V] field description . . . . . . . . . . . . . . . . . . . . . . . . . . 63
DC electrical characteristics (5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
DC electrical characteristics (3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
I/O pad current specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.12
3.13
3.14
3.15
Main oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 72
FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . 74
Analog-to-Digital converter (ADC) electrical characteristics . . . . . . . . . . . 74
3.15.1
3.15.2
Input impedance and ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
ADC conversion characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
3.16
Flash memory electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 81
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Contents
3.17
3.18
AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
3.17.1
3.18.1
3.18.2
3.18.3
3.18.4
3.18.5
Pad AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
RESET pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
IEEE 1149.1 interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Nexus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
External interrupt timing (IRQ pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.1
4.2
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.2.1
4.2.2
LQFP144 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . 97
LQFP100 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
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