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NSVMMUN2235LT1G

Description
Multilayer Ceramic Capacitors MLCC - SMD/SMT 1210 47uF 6.3volts X7R 10%
CategoryDiscrete semiconductor    The transistor   
File Size108KB,12 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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NSVMMUN2235LT1G Overview

Multilayer Ceramic Capacitors MLCC - SMD/SMT 1210 47uF 6.3volts X7R 10%

NSVMMUN2235LT1G Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
package instructionSMALL OUTLINE, R-PDSO-G3
Manufacturer packaging code318-08
Reach Compliance Codecompliant
Factory Lead Time4 weeks
Other featuresBUILT IN BIAS RESISTANCE RATIO IS 21
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)80
JEDEC-95 codeTO-236
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeNPN
GuidelineAEC-Q101
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
MUN2235, MMUN2235L,
MUN5235, DTC123JE,
DTC123JM3, NSBC123JF3
Digital Transistors (BRT)
R1 = 2.2 kW, R2 = 47 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
PIN 1
BASE
(INPUT)
www.onsemi.com
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
12
6
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
MARKING DIAGRAMS
SC−59
CASE 318D
STYLE 1
XX MG
G
1
XXX MG
G
1
SOT−23
CASE 318
STYLE 6
XX MG
G
1
XX M
1
XX M
1
XM 1
XXX
M
G
SC−70/SOT−323
CASE 419
STYLE 3
SC−75
CASE 463
STYLE 1
SOT−723
CASE 631AA
STYLE 1
SOT−1123
CASE 524AA
STYLE 1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2012
1
March, 2017 − Rev. 5
Publication Order Number:
DTC123J/D

NSVMMUN2235LT1G Related Products

NSVMMUN2235LT1G MMUN2235LT1G
Description Multilayer Ceramic Capacitors MLCC - SMD/SMT 1210 47uF 6.3volts X7R 10% MOSFET PFET SO8 30V 9.6A TR
Brand Name ON Semiconductor ON Semiconductor
Is it lead-free? Lead free Lead free
package instruction SMALL OUTLINE, R-PDSO-G3 SMALL OUTLINE, R-PDSO-G3
Manufacturer packaging code 318-08 318-08
Reach Compliance Code compliant compliant
Factory Lead Time 4 weeks 6 weeks
Other features BUILT IN BIAS RESISTANCE RATIO IS 21 BUILT IN BIAS RESISTANCE RATIO IS 21.36
Maximum collector current (IC) 0.1 A 0.1 A
Collector-emitter maximum voltage 50 V 50 V
Configuration SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE) 80 80
JEDEC-95 code TO-236 TO-236AB
JESD-30 code R-PDSO-G3 R-PDSO-G3
JESD-609 code e3 e3
Humidity sensitivity level 1 1
Number of components 1 1
Number of terminals 3 3
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
Polarity/channel type NPN NPN
surface mount YES YES
Terminal surface Tin (Sn) Tin (Sn)
Terminal form GULL WING GULL WING
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
Base Number Matches 1 1

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