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MACH120-15JC

Among 1 related components, MACH120-15JC have related pdf.
Part Number Manufacturer Description Datasheet
MACH120-15JC Lattice EE PLD, 15 ns, PQCC68 Download
MACH120-15JC parameters:

Description

EE PLD, 15ns, 48-Cell, CMOS, PQCC68,

Parametric
Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerVantis Corporation
Reach Compliance Codeunknown
Other features48 MACROCELLS; 48 FLIP FLOPS
maximum clock frequency47.6 MHz
In-system programmableNO
JESD-30 codeS-PQCC-J68
JESD-609 codee0
JTAG BSTNO
Dedicated input times4
Number of I/O lines48
Number of macro cells48
Number of terminals68
Maximum operating temperature70 °C
Minimum operating temperature
organize4 DEDICATED INPUTS, 48 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC68,1.0SQ
Package shapeSQUARE
Package formCHIP CARRIER
power supply5 V
Programmable logic typeEE PLD
propagation delay15 ns
Certification statusNot Qualified
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD

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