Part Number | Manufacturer | Description | Datasheet |
---|---|---|---|
MACH120-15JC | Lattice | EE PLD, 15 ns, PQCC68 | Download |
EE PLD, 15ns, 48-Cell, CMOS, PQCC68,
Parameter Name | Attribute value |
Is it Rohs certified? | incompatible |
Maker | Vantis Corporation |
Reach Compliance Code | unknown |
Other features | 48 MACROCELLS; 48 FLIP FLOPS |
maximum clock frequency | 47.6 MHz |
In-system programmable | NO |
JESD-30 code | S-PQCC-J68 |
JESD-609 code | e0 |
JTAG BST | NO |
Dedicated input times | 4 |
Number of I/O lines | 48 |
Number of macro cells | 48 |
Number of terminals | 68 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
organize | 4 DEDICATED INPUTS, 48 I/O |
Output function | MACROCELL |
Package body material | PLASTIC/EPOXY |
encapsulated code | QCCJ |
Encapsulate equivalent code | LDCC68,1.0SQ |
Package shape | SQUARE |
Package form | CHIP CARRIER |
power supply | 5 V |
Programmable logic type | EE PLD |
propagation delay | 15 ns |
Certification status | Not Qualified |
Maximum supply voltage | 5.25 V |
Minimum supply voltage | 4.75 V |
Nominal supply voltage | 5 V |
surface mount | YES |
technology | CMOS |
Temperature level | COMMERCIAL |
Terminal surface | Tin/Lead (Sn/Pb) |
Terminal form | J BEND |
Terminal pitch | 1.27 mm |
Terminal location | QUAD |