PT6111
Analog Front End for 3~8 cells
Battery Monitoring and Balancing
GENERAL DESCRIPTION
PT6111
is
a
highly
integrated
battery
charge/discharge
and
balancing
management
FEATURES
Battery Voltage Sample and Buffer
8 channels for cell voltage measurements
High-precision cell voltage detection:
±15mV
@4.2V
1:1 buffer for cell voltage output
Integrated Charge and Discharge MOSFET
driver
Integrated 50mA cell balance driver
Integrated 5V LDO for external MCU: >45mA
Internal thermal shutdown (TSD)
Low power consumption in sleep mode:
<12μA (EN=0)
analog front end which support 3 to 7 cells serially
connected Li-ion, Li-polymer or 3 to 8 cells serially
LiFePO
4
battery pack. It is applicable in cordless
electrical tools, vacuum cleaner or other multi-cell
battery powered systems. PT6111 use a high
precision amplifier to buffer each battery cell
voltage to an analog output pin. All output voltages
are alternatively selected by the co-working MCU
and digitized by the ADC within that MCU. The
integrated battery balance circuitry in the PT6111
provides a shunt current of 50mA without the need
of any external transistors. The chip also includes
important features such as an integrated LDO
which power for an external MCU, charge and
discharge power MOSFETs driver
PT6111 works together with an MCU performs
battery
safety
protections
against
battery
over-voltage, under-voltage and cell balancing.
PT6111 is available in QFN-24(4x4) package.
APPLICATIONS
Vacuum cleaner
Power tools
Multi-cell battery pack in portable devices
ORDERING INFORMATION
PACKAGE
QFN-24
Note:
TEMPERATUR
ERANGE
-40° to 85°
C
C
原厂技术支持:联系人:徐俐湘 联系电话:18565820880
TRANSPORT
MEDIA
Tape and Reel
5000 units
MARKING
PT6111
xxxxxX
ORDERING PART NUMBER
PT6111EQFN
xxxxxX
Assembly Factory Code
Lot Number
CR POWTECH (SHANGHAI) CO., LTD.
PT6111_DS_Rev EN 1.1
WWW.CRPOWTECH.COM
Page 1
PT6111
Analog Front End for 3~8 cells
Battery Monitoring and Balancing
PIN DESCRIPTION
Pin #(QFN-24)
1
2
3
4
5
6
7
8
9
10
11
12
13
Name
VIN
VB8
VB7
VB6
VB5
VB4
VB3
VB2
VB1
VB0
VOUT
EN
BS0
Description
Power supply
Positive input Battery cell 8
Negative input Battery cell 8, Positive input Battery cell 7
Negative input Battery cell 7, Positive input Battery cell 6
Negative input Battery cell 6, Positive input Battery cell 5
Negative input Battery cell 5, Positive input Battery cell 4
Negative input Battery cell 4, Positive input Battery cell 3
Negative input Battery cell 3, Positive input Battery cell 2
Negative input Battery cell 2, Positive input Battery cell 1
Negative input Battery cell 1, ground
Battery voltage buffer output
Enable/Sleep the chip;
Balance Select:
EN=1, enable the chip; EN=0, sleep
BS2,BS1,BS0=000, 1st (lowest) battery cell;
BS2,BS1,BS0=001, 2nd battery cell;
BS2,BS1,BS0=010, 3rd battery cell;
14
BS1
BS2,BS1,BS0=011, 4th battery cell;
BS2,BS1,BS0=100, 5th battery cell;
15
BS2
BS2,BS1,BS0=101, 6th battery cell;
BS2,BS1,BS0=110, 7th battery cell;
BS2,BS1,BS0=111, 8th battery cell;
16
17
BL
CS0
Enable/disable the balance current; BL=1, Balance enable
Cell Select:
CS2,CS1,CS0=000, 1st (lowest) battery cell;
CS2,CS1,CS0=001, 2nd battery cell;
CS2,CS1,CS0=010, 3rd battery cell;
18
CS1
CS2,CS1,CS0=011, 4th battery cell;
CS2,CS1,CS0=100, 5th battery cell;
19
CS2
CS2,CS1,CS0=101, 6th battery cell;
CS2,CS1,CS0=110, 7th battery cell;
CS2,CS1,CS0=111, 8th battery cell;
20
21
22
23
24
PAD
VDDD
CH_IN
DS_IN
DS_FET
CH_FET
5V LDO output
Charge control input
Discharge control input
Discharge MOSFET driver controlled by DS_IN (DS_IN=1, DS_FET out
high; DS_IN=0, DS_FET output low)
Charge MOSFET Driver controlled by CH_IN (CH_IN=1, CH_FET
source current; CH_IN=0, high impedance)
Thermal Pad, Connect to GND.
CR POWTECH (SHANGHAI) CO., LTD.
PT6111_DS_Rev EN 1.1
WWW.CRPOWTECH.COM
Page 4