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CJ2312

Description
Drain-source voltage (Vdss): 20V Continuous drain current (Id) (at 25°C): 5A Gate-source threshold voltage: 1V @ 250uA Drain-source on-resistance: 31.8mΩ @ 5A, 4.5V Maximum power dissipation ( Ta=25°C): 350mW Type: N-channel N-channel, 20V, 5A, 31.8mΩ@4.5V
CategoryDiscrete semiconductor    MOS (field effect tube)   
File Size179KB,3 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

Download Datasheet Parametric View All

CJ2312 Overview

Drain-source voltage (Vdss): 20V Continuous drain current (Id) (at 25°C): 5A Gate-source threshold voltage: 1V @ 250uA Drain-source on-resistance: 31.8mΩ @ 5A, 4.5V Maximum power dissipation ( Ta=25°C): 350mW Type: N-channel N-channel, 20V, 5A, 31.8mΩ@4.5V

CJ2312 Parametric

Parameter NameAttribute value
Drain-source voltage (Vdss)20V
Continuous drain current (Id) at 25°C5A
Gate-source threshold voltage1V @ 250uA
Drain-source on-resistance31.8mΩ @ 5A,4.5V
Maximum power dissipation (Ta=25°C)350mW
typeN channel

CJ2312 Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-23 Plastic-Encapsulate MOSFETS
CJ2312
N-Channel 20-V(D-S) MOSFET
SOT-23
APPLICATIONS
DC/DC Converters
Load Switching for Portable Applications
1. GATE
2. SOURCE
3. DRAIN
MARKING:
S12
Maximum ratings (T
a
=25℃ unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Continuous Source-Drain Diode Current
Maximum Power Dissipation
Thermal Resistance from Junction to Ambient
Junction Temperature
Storage Temperature
t=5s
t=5s
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
R
θJA
T
J
T
stg
Value
20
±8.0
5
20
1.04
0.35
357
150
-50 ~+150
W
℃/W
A
Unit
V
B,Dec,2011
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