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CESDLC3V0L4

File Size887KB,6 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

Download Datasheet Parametric View All

CESDLC3V0L4 Parametric

Parameter NameAttribute value
polarityUnidirectional
Reverse shutdown voltage (typ)3V
Breakdown voltage (minimum value)5.3V
clamping voltage8V
Peak pulse current (10/1000us)2.5A

CESDLC3V0L4 Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-553 Plastic-Encapsulate Diodes
CESDLC3V0L4
DESCRIPTION
Designed to protect voltage sensitive electronic components from ESD and other
transients. Excellent clamping capability, low leakage, low capacitance, and fast
response time provide best in class protection on designs that are exposed to ESD.
The combination of small size, low capacitance, and high level of ESD protection
makes them a flexible solution for applications such as HDMI, Display Port TM, and
MDDI interfaces. It is designed to replace multiplayer varistors (MLV) in consumer
equipments applications such as mobile phone, notebook, PAD, STB, LCD TV etc.
1
2
3
5
4
Quad-direction ESD Protection Array
SOT-553
FEATURES
Uni-directional ESD protection of four lines
Low capacitance: 9 pF(Typ)
Low reverse stand−off voltage: 3V
Low reverse clamping voltage
Low leakage current
Excellent package:1.6mm×1.2mm×0.6mm
Fast response time
JESD22-A114-B ESD Rating of class 3B per human
body model
IEC 61000-4-2 Level 3 ESD protection
APPLICATIONS
Computers and peripherals
Audio and video equipment
Cellular handsets and accessories
Portable electronics
Other electronics equipments
communication systems
MARKING
5P = Device code
Solid dot=Pin1 indicator
Front side
www.cj-elec.com
1
B,May,2014

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