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CESD3V3AP

Description
ESD protection diode
CategoryDiscrete semiconductor   
File Size1MB,2 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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CESD3V3AP Overview

ESD protection diode

Features

Product Name: ESD Protection Diode


Product model: CESD3V3AP


Product Description:


The CESD3V3AP is designed to protect voltage sensitive 1


components from ESD. Excellent clamping capability, low leakage,


and fast response time provide best in class protection on designs that


are exposed to ESD. Because of its small size, it is suited for use in


cellular phones, MP3 players, digital cameras and many other portable


applications where board space is at a premium.



Product Features:


Stand?off Voltage: 3.3 V?12 V


Low Leakage


Response Time is Typically < 1 ns


ESD Rating of Class 3 (> 16 kV) per Human Body Model


IEC61000?4?2 Level 4 ESD Protection


These are Pb?Free Devices



Product parameters:


Pd dissipated power: 225mW


Vrwm reverse working peak voltage: 3.3V


V(BR) Breakdown voltage: Min=5V Max=5.9V


IR maximum reverse leakage current: 10uA


IT test current: 1mA


VC clamping voltage: 9.3V


IPP reverse pulse current peak: 1A


C Capacitance: 150+pF



Package: SOT-23

CESD3V3AP Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-23 Plastic-Encapsulate Diodes
CESD3V3AP
ESD Protection Diode
SOT-23
DESCRIPTION
The CESD3V3AP is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space is at a premium.
FEATURES
Stand−off Voltage:
3.3
V−12 V
Low Leakage
Response Time is Typically < 1 ns
ESD Rating of Class 3 (> 16 kV) per Human Body Model
IEC61000−4−2 Level 4 ESD Protection
These are Pb−Free Devices
1
1
3
2
Maximum Ratings @Ta=25℃
Parameter
IEC61000−4−2(ESD)
ESD voltage
Air
Contact
per human body model
P
D
R
ΘJA
T
L
T
j,
T
stg
Symbol
Limit
±15
±8.0
16
225
556
260
-55 ~ +150
Unit
KV
KV
mW
℃/W
Total power dissipation on FR-5 board (Note 1)
Thermal Resistance Junction−to−Ambient
Lead Solder Temperature
Maximum (10 Second Duration)
Junction and Storage
Temperature Rang
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only.
Functional operation above the Recommended. Operating Conditions is not implied. Extended exposure to
stresses above the Recommended Operating Conditions may affect device reliability.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
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