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2N7002M

Description
Transistor
CategoryDiscrete semiconductor    The transistor   
File Size251KB,4 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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2N7002M Overview

Transistor

2N7002M Parametric

Parameter NameAttribute value
package instruction,
Reach Compliance Codeunknow
Base Number Matches1

2N7002M Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
WBFBP-03B Plastic-Encapsulate MOSFET
2N7002M
DESCRIPTION
High cell density, DMOS technology. These products have been designed to
minimize on-state resistance while provide rugged, reliable, and fast switching
performance. They can be used in most applications requiring up to 400mA DC
and can deliver pulsed currents up to 2A. These products are particularly suited
for low voltage, low current applications such as small servo motor control, power
MOSFET gate drivers, and other switching applications.
1. GATE
2. SOURCE
3. DRAIN
MOSFET( N-Channel )
D
WBFBP-03B
(1.2×1.2×0.5)
unit: mm
TOP
G
D
S
BACK
S
G
FEATURES
High density cell design for low RDS(ON).
Voltage controlled small signal switch.
Rugged and reliable.
High saturation current capability.
APPLICATION
N-Channel Enhancement Mode Field Effect Transistor
For portable equipment:(i.e. Mobile phone,MP3, MD,CD-ROM,
DVD-ROM, Note book PC, etc.)
MARKING: 72
D
72
G
S
MAXIMUM RATINGS* T
A
=25
unless otherwise noted
Symbol
V
DS
I
D
P
D
R
θ
JA
T
J
T
stg
Drain-Source voltage
Drain Current
Power Dissipation
Thermal Resistance. Junction to Ambient Air
Junction Temperature
Storage Temperature
Parameter
Value
60
115
150
625
150
-55-150
Units
V
mA
mW
℃/W
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