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Analog Multiplier Circuit Design

Source: InternetPublisher:aytwartoofyoroo Updated: 2021/02/22

The figure below shows a simple implementation of an analog multiplier. This circuit provides three quadrants jQuery11240042591938050463796_1494831977823 simulated multiplication, which is relatively temperature insensitive, which is immune to bias current errors, which plagues most multipliers and circumvents many of the problems associated with log antilog circuits.

Analog Multiplier Circuit Design

Consider amplifier A2 as the control gain, amplifying V2, whose gain depends on the ratio of the resistance of PC2 to R5, and consider the resistance of PC2 to establish V1 function as control amplifier A1, which can be used for circuit operation. It can be seen that Vout is a function of V1 and V2 in this way.

Lamp L1 is driven by the control amplifier (A1). L1 is driven until the current A1 summed from the negative supply junction through PC1 is equal to the current summed from V1 via the R1 junction, when the input voltage (V1) is present. This force resistor value of PC1 is proportional to the ratio of R1 and V1 because the negative supply voltage V is fixed. L1 also illuminates PC2 and cause PC2 has a resistance equal to that given to PC1 if the photoconductor drums match.

As an inverting amplifier, the gain equal to the ratio of PC2's resistor to R5 controls the behavior of the amplifier (A2). VOUT becomes simply the product of V1 and V2 if R5 is chosen to be equal to the product of R1 and V - In order to provide any desired output scale factor, the power of R5 can be scaled by ten.

Since the resistance of the TC is resistor-matched to the same geometry of the cell, PC1 and PC2 should match best over temperature tracking. Changing the value of R5 scale factor adjustment is used to compensate for small mismatches. The photosensitive cells receive L1 equal lighting, a convenient way is to install the light halfway between them. Controlling the spacing and thermal bridge between the two cells to reduce cell temperature differences is provided with this mounting method. We can extend this technology using FETs or other devices to meet special resistance or environmental requirements.

At this track is an inverting output whose magnitude is equal to one-tenth the product of the two analog inputs. Positive values ​​are entered into V1, but the limitations of V2 may bear both positive and negative values. The bulb uses a time constant and its circuitry limits low frequency operation.

R2 and R4 are selected in order to minimize errors due to input offset current as described in the photoamplifier overview section. To reduce the inrush current when firdt turn signal (L1), R3 is.

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