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Single pulse generator circuit diagram

Source: InternetPublisher:萌面大虾 Updated: 2021/01/04

When a mechanical switch is closed, "jitter" will generally occur. In some control circuits, this phenomenon is not allowed to occur. As shown in the figure, it is a single pulse generator, which can effectively eliminate the jitter problem of mechanical switches.

Single pulse generator circuit diagram

Figure, single pulse generator

When turning on, R and C clear IC1, Q1=Q2=0. J-K flip-flop IC1 is connected as a 2-bit shift register. When switch K is set to a, gate c outputs "1". When the CP pulse arrives, Q1=J1=1. At this time, if K generates jitter, assuming it is one on and one off, as long as K is not connected to -a, The output of gate c is "1" unchanged. When the next CP pulse comes, Q2=J2=1, the state changes of Q1 and -Q2 have exactly gone through the period of one CP pulse, and after passing through the NAND gate 2a, a single pulse is output. The waveform diagram is shown in the figure.

Single pulse generator waveform diagram

Figure, single pulse generator waveform diagram

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